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https://github.com/RPCS3/llvm-mirror.git
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f27bf7435a
The dream of a unified check-line auto-generator for all phases of compilation is dead. The llc script has already diverged to be better at its goal, so having 2 scripts that do almost the same thing is just causing confusion for newcomers. I plan to fix up more x86 tests in a next commit. We can rip out the llc ability in update_test_checks.py after that. llvm-svn: 305202
643 lines
20 KiB
LLVM
643 lines
20 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx | FileCheck %s --check-prefix=AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx512f | FileCheck %s --check-prefix=AVX512
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=avx512f | FileCheck %s --check-prefix=AVX512
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; Test all cmp predicates that can be used with SSE.
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define float @select_fcmp_oeq_f32(float %a, float %b, float %c, float %d) {
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; SSE-LABEL: select_fcmp_oeq_f32:
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; SSE: # BB#0:
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; SSE-NEXT: cmpeqss %xmm1, %xmm0
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; SSE-NEXT: andps %xmm0, %xmm2
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; SSE-NEXT: andnps %xmm3, %xmm0
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; SSE-NEXT: orps %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_oeq_f32:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_oeq_f32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpeqss %xmm1, %xmm0, %k1
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; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovaps %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp oeq float %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define double @select_fcmp_oeq_f64(double %a, double %b, double %c, double %d) {
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; SSE-LABEL: select_fcmp_oeq_f64:
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; SSE: # BB#0:
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; SSE-NEXT: cmpeqsd %xmm1, %xmm0
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; SSE-NEXT: andpd %xmm0, %xmm2
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; SSE-NEXT: andnpd %xmm3, %xmm0
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; SSE-NEXT: orpd %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_oeq_f64:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_oeq_f64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpeqsd %xmm1, %xmm0, %k1
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; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovapd %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp oeq double %a, %b
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%2 = select i1 %1, double %c, double %d
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ret double %2
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}
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define float @select_fcmp_ogt_f32(float %a, float %b, float %c, float %d) {
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; SSE-LABEL: select_fcmp_ogt_f32:
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; SSE: # BB#0:
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; SSE-NEXT: cmpltss %xmm0, %xmm1
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; SSE-NEXT: andps %xmm1, %xmm2
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; SSE-NEXT: andnps %xmm3, %xmm1
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; SSE-NEXT: orps %xmm2, %xmm1
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_ogt_f32:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpltss %xmm0, %xmm1, %xmm0
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; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_ogt_f32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpltss %xmm0, %xmm1, %k1
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; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovaps %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp ogt float %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define double @select_fcmp_ogt_f64(double %a, double %b, double %c, double %d) {
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; SSE-LABEL: select_fcmp_ogt_f64:
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; SSE: # BB#0:
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; SSE-NEXT: cmpltsd %xmm0, %xmm1
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; SSE-NEXT: andpd %xmm1, %xmm2
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; SSE-NEXT: andnpd %xmm3, %xmm1
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; SSE-NEXT: orpd %xmm2, %xmm1
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; SSE-NEXT: movapd %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_ogt_f64:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpltsd %xmm0, %xmm1, %xmm0
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; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_ogt_f64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpltsd %xmm0, %xmm1, %k1
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; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovapd %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp ogt double %a, %b
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%2 = select i1 %1, double %c, double %d
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ret double %2
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}
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define float @select_fcmp_oge_f32(float %a, float %b, float %c, float %d) {
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; SSE-LABEL: select_fcmp_oge_f32:
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; SSE: # BB#0:
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; SSE-NEXT: cmpless %xmm0, %xmm1
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; SSE-NEXT: andps %xmm1, %xmm2
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; SSE-NEXT: andnps %xmm3, %xmm1
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; SSE-NEXT: orps %xmm2, %xmm1
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_oge_f32:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpless %xmm0, %xmm1, %xmm0
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; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_oge_f32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpless %xmm0, %xmm1, %k1
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; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovaps %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp oge float %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define double @select_fcmp_oge_f64(double %a, double %b, double %c, double %d) {
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; SSE-LABEL: select_fcmp_oge_f64:
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; SSE: # BB#0:
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; SSE-NEXT: cmplesd %xmm0, %xmm1
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; SSE-NEXT: andpd %xmm1, %xmm2
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; SSE-NEXT: andnpd %xmm3, %xmm1
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; SSE-NEXT: orpd %xmm2, %xmm1
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; SSE-NEXT: movapd %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_oge_f64:
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; AVX: # BB#0:
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; AVX-NEXT: vcmplesd %xmm0, %xmm1, %xmm0
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; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_oge_f64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmplesd %xmm0, %xmm1, %k1
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; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovapd %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp oge double %a, %b
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%2 = select i1 %1, double %c, double %d
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ret double %2
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}
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define float @select_fcmp_olt_f32(float %a, float %b, float %c, float %d) {
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; SSE-LABEL: select_fcmp_olt_f32:
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; SSE: # BB#0:
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; SSE-NEXT: cmpltss %xmm1, %xmm0
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; SSE-NEXT: andps %xmm0, %xmm2
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; SSE-NEXT: andnps %xmm3, %xmm0
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; SSE-NEXT: orps %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_olt_f32:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpltss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_olt_f32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpltss %xmm1, %xmm0, %k1
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; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovaps %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp olt float %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define double @select_fcmp_olt_f64(double %a, double %b, double %c, double %d) {
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; SSE-LABEL: select_fcmp_olt_f64:
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; SSE: # BB#0:
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; SSE-NEXT: cmpltsd %xmm1, %xmm0
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; SSE-NEXT: andpd %xmm0, %xmm2
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; SSE-NEXT: andnpd %xmm3, %xmm0
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; SSE-NEXT: orpd %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_olt_f64:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpltsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_olt_f64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpltsd %xmm1, %xmm0, %k1
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; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovapd %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp olt double %a, %b
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%2 = select i1 %1, double %c, double %d
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ret double %2
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}
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define float @select_fcmp_ole_f32(float %a, float %b, float %c, float %d) {
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; SSE-LABEL: select_fcmp_ole_f32:
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; SSE: # BB#0:
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; SSE-NEXT: cmpless %xmm1, %xmm0
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; SSE-NEXT: andps %xmm0, %xmm2
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; SSE-NEXT: andnps %xmm3, %xmm0
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; SSE-NEXT: orps %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_ole_f32:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpless %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_ole_f32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpless %xmm1, %xmm0, %k1
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; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovaps %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp ole float %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define double @select_fcmp_ole_f64(double %a, double %b, double %c, double %d) {
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; SSE-LABEL: select_fcmp_ole_f64:
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; SSE: # BB#0:
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; SSE-NEXT: cmplesd %xmm1, %xmm0
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; SSE-NEXT: andpd %xmm0, %xmm2
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; SSE-NEXT: andnpd %xmm3, %xmm0
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; SSE-NEXT: orpd %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_ole_f64:
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; AVX: # BB#0:
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; AVX-NEXT: vcmplesd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_ole_f64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmplesd %xmm1, %xmm0, %k1
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; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovapd %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp ole double %a, %b
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%2 = select i1 %1, double %c, double %d
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ret double %2
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}
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define float @select_fcmp_ord_f32(float %a, float %b, float %c, float %d) {
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; SSE-LABEL: select_fcmp_ord_f32:
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; SSE: # BB#0:
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; SSE-NEXT: cmpordss %xmm1, %xmm0
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; SSE-NEXT: andps %xmm0, %xmm2
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; SSE-NEXT: andnps %xmm3, %xmm0
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; SSE-NEXT: orps %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_ord_f32:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpordss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_ord_f32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpordss %xmm1, %xmm0, %k1
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; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovaps %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp ord float %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define double @select_fcmp_ord_f64(double %a, double %b, double %c, double %d) {
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; SSE-LABEL: select_fcmp_ord_f64:
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; SSE: # BB#0:
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; SSE-NEXT: cmpordsd %xmm1, %xmm0
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; SSE-NEXT: andpd %xmm0, %xmm2
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; SSE-NEXT: andnpd %xmm3, %xmm0
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; SSE-NEXT: orpd %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_ord_f64:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_ord_f64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpordsd %xmm1, %xmm0, %k1
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; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovapd %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp ord double %a, %b
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%2 = select i1 %1, double %c, double %d
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ret double %2
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}
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define float @select_fcmp_uno_f32(float %a, float %b, float %c, float %d) {
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; SSE-LABEL: select_fcmp_uno_f32:
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; SSE: # BB#0:
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; SSE-NEXT: cmpunordss %xmm1, %xmm0
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; SSE-NEXT: andps %xmm0, %xmm2
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; SSE-NEXT: andnps %xmm3, %xmm0
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; SSE-NEXT: orps %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_uno_f32:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpunordss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_uno_f32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vcmpunordss %xmm1, %xmm0, %k1
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; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
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; AVX512-NEXT: vmovaps %xmm3, %xmm0
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; AVX512-NEXT: retq
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%1 = fcmp uno float %a, %b
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%2 = select i1 %1, float %c, float %d
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ret float %2
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}
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define double @select_fcmp_uno_f64(double %a, double %b, double %c, double %d) {
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; SSE-LABEL: select_fcmp_uno_f64:
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; SSE: # BB#0:
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; SSE-NEXT: cmpunordsd %xmm1, %xmm0
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; SSE-NEXT: andpd %xmm0, %xmm2
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; SSE-NEXT: andnpd %xmm3, %xmm0
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; SSE-NEXT: orpd %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: select_fcmp_uno_f64:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpunordsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: select_fcmp_uno_f64:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpunordsd %xmm1, %xmm0, %k1
|
|
; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovapd %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp uno double %a, %b
|
|
%2 = select i1 %1, double %c, double %d
|
|
ret double %2
|
|
}
|
|
|
|
define float @select_fcmp_ugt_f32(float %a, float %b, float %c, float %d) {
|
|
; SSE-LABEL: select_fcmp_ugt_f32:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpnless %xmm1, %xmm0
|
|
; SSE-NEXT: andps %xmm0, %xmm2
|
|
; SSE-NEXT: andnps %xmm3, %xmm0
|
|
; SSE-NEXT: orps %xmm2, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_ugt_f32:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpnless %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_ugt_f32:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpnless %xmm1, %xmm0, %k1
|
|
; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovaps %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp ugt float %a, %b
|
|
%2 = select i1 %1, float %c, float %d
|
|
ret float %2
|
|
}
|
|
|
|
define double @select_fcmp_ugt_f64(double %a, double %b, double %c, double %d) {
|
|
; SSE-LABEL: select_fcmp_ugt_f64:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpnlesd %xmm1, %xmm0
|
|
; SSE-NEXT: andpd %xmm0, %xmm2
|
|
; SSE-NEXT: andnpd %xmm3, %xmm0
|
|
; SSE-NEXT: orpd %xmm2, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_ugt_f64:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpnlesd %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_ugt_f64:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpnlesd %xmm1, %xmm0, %k1
|
|
; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovapd %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp ugt double %a, %b
|
|
%2 = select i1 %1, double %c, double %d
|
|
ret double %2
|
|
}
|
|
|
|
define float @select_fcmp_uge_f32(float %a, float %b, float %c, float %d) {
|
|
; SSE-LABEL: select_fcmp_uge_f32:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpnltss %xmm1, %xmm0
|
|
; SSE-NEXT: andps %xmm0, %xmm2
|
|
; SSE-NEXT: andnps %xmm3, %xmm0
|
|
; SSE-NEXT: orps %xmm2, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_uge_f32:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpnltss %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_uge_f32:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpnltss %xmm1, %xmm0, %k1
|
|
; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovaps %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp uge float %a, %b
|
|
%2 = select i1 %1, float %c, float %d
|
|
ret float %2
|
|
}
|
|
|
|
define double @select_fcmp_uge_f64(double %a, double %b, double %c, double %d) {
|
|
; SSE-LABEL: select_fcmp_uge_f64:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpnltsd %xmm1, %xmm0
|
|
; SSE-NEXT: andpd %xmm0, %xmm2
|
|
; SSE-NEXT: andnpd %xmm3, %xmm0
|
|
; SSE-NEXT: orpd %xmm2, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_uge_f64:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpnltsd %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_uge_f64:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpnltsd %xmm1, %xmm0, %k1
|
|
; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovapd %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp uge double %a, %b
|
|
%2 = select i1 %1, double %c, double %d
|
|
ret double %2
|
|
}
|
|
|
|
define float @select_fcmp_ult_f32(float %a, float %b, float %c, float %d) {
|
|
; SSE-LABEL: select_fcmp_ult_f32:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpnless %xmm0, %xmm1
|
|
; SSE-NEXT: andps %xmm1, %xmm2
|
|
; SSE-NEXT: andnps %xmm3, %xmm1
|
|
; SSE-NEXT: orps %xmm2, %xmm1
|
|
; SSE-NEXT: movaps %xmm1, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_ult_f32:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpnless %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_ult_f32:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpnless %xmm0, %xmm1, %k1
|
|
; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovaps %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp ult float %a, %b
|
|
%2 = select i1 %1, float %c, float %d
|
|
ret float %2
|
|
}
|
|
|
|
define double @select_fcmp_ult_f64(double %a, double %b, double %c, double %d) {
|
|
; SSE-LABEL: select_fcmp_ult_f64:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpnlesd %xmm0, %xmm1
|
|
; SSE-NEXT: andpd %xmm1, %xmm2
|
|
; SSE-NEXT: andnpd %xmm3, %xmm1
|
|
; SSE-NEXT: orpd %xmm2, %xmm1
|
|
; SSE-NEXT: movapd %xmm1, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_ult_f64:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpnlesd %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_ult_f64:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpnlesd %xmm0, %xmm1, %k1
|
|
; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovapd %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp ult double %a, %b
|
|
%2 = select i1 %1, double %c, double %d
|
|
ret double %2
|
|
}
|
|
|
|
define float @select_fcmp_ule_f32(float %a, float %b, float %c, float %d) {
|
|
; SSE-LABEL: select_fcmp_ule_f32:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpnltss %xmm0, %xmm1
|
|
; SSE-NEXT: andps %xmm1, %xmm2
|
|
; SSE-NEXT: andnps %xmm3, %xmm1
|
|
; SSE-NEXT: orps %xmm2, %xmm1
|
|
; SSE-NEXT: movaps %xmm1, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_ule_f32:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpnltss %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_ule_f32:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpnltss %xmm0, %xmm1, %k1
|
|
; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovaps %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp ule float %a, %b
|
|
%2 = select i1 %1, float %c, float %d
|
|
ret float %2
|
|
}
|
|
|
|
define double @select_fcmp_ule_f64(double %a, double %b, double %c, double %d) {
|
|
; SSE-LABEL: select_fcmp_ule_f64:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpnltsd %xmm0, %xmm1
|
|
; SSE-NEXT: andpd %xmm1, %xmm2
|
|
; SSE-NEXT: andnpd %xmm3, %xmm1
|
|
; SSE-NEXT: orpd %xmm2, %xmm1
|
|
; SSE-NEXT: movapd %xmm1, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_ule_f64:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpnltsd %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_ule_f64:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpnltsd %xmm0, %xmm1, %k1
|
|
; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovapd %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp ule double %a, %b
|
|
%2 = select i1 %1, double %c, double %d
|
|
ret double %2
|
|
}
|
|
|
|
define float @select_fcmp_une_f32(float %a, float %b, float %c, float %d) {
|
|
; SSE-LABEL: select_fcmp_une_f32:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpneqss %xmm1, %xmm0
|
|
; SSE-NEXT: andps %xmm0, %xmm2
|
|
; SSE-NEXT: andnps %xmm3, %xmm0
|
|
; SSE-NEXT: orps %xmm2, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_une_f32:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpneqss %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_une_f32:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpneqss %xmm1, %xmm0, %k1
|
|
; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovaps %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp une float %a, %b
|
|
%2 = select i1 %1, float %c, float %d
|
|
ret float %2
|
|
}
|
|
|
|
define double @select_fcmp_une_f64(double %a, double %b, double %c, double %d) {
|
|
; SSE-LABEL: select_fcmp_une_f64:
|
|
; SSE: # BB#0:
|
|
; SSE-NEXT: cmpneqsd %xmm1, %xmm0
|
|
; SSE-NEXT: andpd %xmm0, %xmm2
|
|
; SSE-NEXT: andnpd %xmm3, %xmm0
|
|
; SSE-NEXT: orpd %xmm2, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: select_fcmp_une_f64:
|
|
; AVX: # BB#0:
|
|
; AVX-NEXT: vcmpneqsd %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: select_fcmp_une_f64:
|
|
; AVX512: # BB#0:
|
|
; AVX512-NEXT: vcmpneqsd %xmm1, %xmm0, %k1
|
|
; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1}
|
|
; AVX512-NEXT: vmovapd %xmm3, %xmm0
|
|
; AVX512-NEXT: retq
|
|
%1 = fcmp une double %a, %b
|
|
%2 = select i1 %1, double %c, double %d
|
|
ret double %2
|
|
}
|
|
|