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78 lines
3.5 KiB
LLVM
78 lines
3.5 KiB
LLVM
; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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; Stack reload folding tests.
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;
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; By including a nop call with sideeffects we can force a partial register spill of the
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; relevant registers and check that the reload is correctly folded into the instruction.
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define i32 @stack_fold_bzhi_u32(i32 %a0, i32 %a1) {
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;CHECK-LABEL: stack_fold_bzhi_u32
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;CHECK: bzhil %eax, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %a0, i32 %a1)
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ret i32 %2
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}
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declare i32 @llvm.x86.bmi.bzhi.32(i32, i32)
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define i64 @stack_fold_bzhi_u64(i64 %a0, i64 %a1) {
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;CHECK-LABEL: stack_fold_bzhi_u64
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;CHECK: bzhiq %rax, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %a0, i64 %a1)
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ret i64 %2
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}
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declare i64 @llvm.x86.bmi.bzhi.64(i64, i64)
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define i64 @stack_fold_mulx_u64(i64 %a0, i64 %a1, i64 *%a2) {
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;CHECK-LABEL: stack_fold_mulx_u64
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;CHECK: mulxq {{-?[0-9]*}}(%rsp), %rax, %rcx {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = zext i64 %a0 to i128
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%3 = zext i64 %a1 to i128
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%4 = mul i128 %2, %3
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%5 = lshr i128 %4, 64
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%6 = trunc i128 %4 to i64
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%7 = trunc i128 %5 to i64
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store i64 %7, i64 *%a2
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ret i64 %6
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}
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define i32 @stack_fold_pdep_u32(i32 %a0, i32 %a1) {
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;CHECK-LABEL: stack_fold_pdep_u32
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;CHECK: pdepl {{-?[0-9]*}}(%rsp), %eax, %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %a0, i32 %a1)
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ret i32 %2
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}
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declare i32 @llvm.x86.bmi.pdep.32(i32, i32)
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define i64 @stack_fold_pdep_u64(i64 %a0, i64 %a1) {
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;CHECK-LABEL: stack_fold_pdep_u64
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;CHECK: pdepq {{-?[0-9]*}}(%rsp), %rax, %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i64 @llvm.x86.bmi.pdep.64(i64 %a0, i64 %a1)
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ret i64 %2
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}
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declare i64 @llvm.x86.bmi.pdep.64(i64, i64)
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define i32 @stack_fold_pext_u32(i32 %a0, i32 %a1) {
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;CHECK-LABEL: stack_fold_pext_u32
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;CHECK: pextl {{-?[0-9]*}}(%rsp), %eax, %eax {{.*#+}} 4-byte Folded Reload
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%1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i32 @llvm.x86.bmi.pext.32(i32 %a0, i32 %a1)
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ret i32 %2
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}
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declare i32 @llvm.x86.bmi.pext.32(i32, i32)
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define i64 @stack_fold_pext_u64(i64 %a0, i64 %a1) {
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;CHECK-LABEL: stack_fold_pext_u64
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;CHECK: pextq {{-?[0-9]*}}(%rsp), %rax, %rax {{.*#+}} 8-byte Folded Reload
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%1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
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%2 = tail call i64 @llvm.x86.bmi.pext.64(i64 %a0, i64 %a1)
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ret i64 %2
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}
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declare i64 @llvm.x86.bmi.pext.64(i64, i64)
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