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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
12 lines
326 B
LLVM
12 lines
326 B
LLVM
; RUN: not llc < %s -march=arm64 2>&1 | FileCheck %s
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; The 'z' constraint allocates either xzr or wzr, but obviously an input of 1 is
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; incompatible.
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define void @test_bad_zero_reg() {
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tail call void asm sideeffect "USE($0)", "z"(i32 1) nounwind
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; CHECK: error: invalid operand for inline asm constraint 'z'
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ret void
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}
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