1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
llvm-mirror/lib/Bitcode/Reader
Tim Northover 5661b7eb80 IR+AArch64: add a "swiftasync" argument attribute.
This extends any frame record created in the function to include that
parameter, passed in X22.

The new record looks like [X22, FP, LR] in memory, and FP is stored with 0b0001
in bits 63:60 (CodeGen assumes they are 0b0000 in normal operation). The effect
of this is that tools walking the stack should expect to see one of three
values there:

  * 0b0000 => a normal, non-extended record with just [FP, LR]
  * 0b0001 => the extended record [X22, FP, LR]
  * 0b1111 => kernel space, and a non-extended record.

All other values are currently reserved.

If compiling for arm64e this context pointer is address-discriminated with the
discriminator 0xc31a and the DB (process-specific) key.

There is also an "i8** @llvm.swift.async.context.addr()" intrinsic providing
front-ends access to this slot (and forcing its creation initialized to nullptr
if necessary).
2021-05-14 11:43:58 +01:00
..
BitcodeAnalyzer.cpp
BitcodeReader.cpp IR+AArch64: add a "swiftasync" argument attribute. 2021-05-14 11:43:58 +01:00
BitReader.cpp
CMakeLists.txt
MetadataLoader.cpp [Bitcode] Ensure DIArgList in bitcode has no null or forward metadata refs 2021-04-22 12:03:33 +01:00
MetadataLoader.h
ValueList.cpp
ValueList.h