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llvm-mirror/test/MC/Disassembler/ARM/invalid-STRBrs-arm.txt
Owen Anderson ffe1c55752 Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
This new disassembler can correctly decode all the testcases that the old one did, though
some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in
operand checking as the old one was.

llvm-svn: 137144
2011-08-09 20:55:18 +00:00

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# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
# XFAIL: *
# Opcode=355 Name=STRBrs Format=ARM_FORMAT_STFRM(7)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 0| 0: 1: 1: 1| 1: 1: 0: 0| 1: 1: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
# -------------------------------------------------------------------------------------------------
#
# if t == 15 then UNPREDICTABLE
0x00 0xf0 0xcf 0xe7