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ffe1c55752
This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144
92 lines
1.7 KiB
Plaintext
92 lines
1.7 KiB
Plaintext
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
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# CHECK: vbif q15, q7, q0
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0x50 0xe1 0x7e 0xf3
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# CHECK: vcvt.f32.s32 q15, q0, #1
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0x50 0xee 0xff 0xf2
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# CHECK: vdup.32 q3, d1[0]
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0x41 0x6c 0xb4 0xf3
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# CHECK: vld1.8 {d17, d18}, [r6], r5
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0x05 0x1a 0x66 0xf4
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# CHECK: vld1.8 {d17, d18, d19}, [r6], r5
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0x05 0x16 0x66 0xf4
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# CHECK: vld4.8 {d0, d1, d2, d3}, [r2], r7
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0x07 0x00 0x22 0xf4
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# CHECK: vld4.8 {d4, d6, d8, d10}, [r2]
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0x0f 0x41 0x22 0xf4
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# CHECK: vld1.32 {d3[], d4[]}, [r0, :32]!
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0xbd 0x3c 0xa0 0xf4
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# CHECK: vld4.16 {d3[], d5[], d7[], d9[]}, [r0, :64]!
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0x7d 0x3f 0xa0 0xf4
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# CHECK: vorr d0, d15, d15
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0x1f 0x01 0x2f 0xf2
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# CHECK: vmov.i64 q6, #0xFF00FF00FF
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0x75 0xce 0x81 0xf2
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# CHECK: vmvn.i32 d0, #0x0
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0x30 0x00 0x80 0xf2
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# CHECK: vmul.f32 d0, d0, d6
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0x16 0x0d 0x00 0xf3
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# CHECK: vneg.f32 q0, q0
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0xc0 0x07 0xb9 0xf3
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# CHECK: vqrdmulh.s32 d0, d0, d3[1]
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0x63 0x0d 0xa0 0xf2
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# CHECK: vrshr.s32 d0, d0, #16
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0x10 0x02 0xb0 0xf2
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# CHECK: vshll.i16 q3, d1, #16
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0x01 0x63 0xb6 0xf3
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# CHECK: vsri.32 q15, q0, #1
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0x50 0xe4 0xff 0xf3
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# CHECK: vtbx.8 d18, {d4, d5, d6}, d7
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0x47 0x2a 0xf4 0xf3
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# CHECK: vmov.f32 s0, #5.000000e-01
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0x00 0x0a 0xb6 0xee
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# CHECK: vmov.f32 s0, #1.328125e-01
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0x01 0x0a 0xb4 0xee
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# CHECK: vmov.f64 d0, #5.000000e-01
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0x00 0x0b 0xb6 0xee
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# CHECK: vpop {d8}
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0x02 0x8b 0xbd 0xec
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# CHECK: vorr.i32 q15, #0x4F0000
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0x5f 0xe5 0xc4 0xf2
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# CHECK: vbic.i32 q2, #0xA900
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0x79 0x43 0x82 0xf3
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# CHECK: vst2.32 {d16, d18}, [r2, :64], r2
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0x92 0x9 0x42 0xf4
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# CHECK: vmov.s8 r0, d8[1]
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0x30 0x0b 0x58 0xee
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# CHECK: vmov r1, r0, d11
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0x1b 0x1b 0x50 0xec
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# CHECK: usada8mi r8, r9, r5, r9
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0x19 0x95 0x88 0x47
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# CHECK: vext.32 q4, q2, q1, #1
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0x42 0x84 0xb4 0xf2
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