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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-24 05:23:45 +02:00
llvm-mirror/test/CodeGen
Matthias Braun 64003711e2 MIR: Support MachineMemOperands without associated value
This is allowed (though used rarely) and useful to keep your tests
short.

llvm-svn: 271752
2016-06-04 00:06:31 +00:00
..
AArch64 [AArch64] Move tests from r271677 to a more appropriately named file. NFC. 2016-06-03 20:11:09 +00:00
AMDGPU AMDGPU: Cleanup load tests 2016-06-02 19:54:26 +00:00
ARM Code size optimisation: do not inline memcpy if this expansion results 2016-06-03 15:38:55 +00:00
BPF [BPF] Remove exit-on-error from tests (PR27768, PR27769) 2016-05-30 08:28:34 +00:00
Generic llc: Rework -run-pass option 2016-05-10 01:32:44 +00:00
Hexagon [Hexagon] Enable the post-RA scheduler 2016-05-26 19:44:28 +00:00
Inputs
Lanai [lanai] Change reloc to use PIC_ by default and cleanup. 2016-05-20 21:41:53 +00:00
Mips [mips] Implement 'la' macro in PIC mode for O32. 2016-06-03 09:53:06 +00:00
MIR MIR: Support MachineMemOperands without associated value 2016-06-04 00:06:31 +00:00
MSP430
NVPTX [NVPTX] Added NVVMIntrRange pass 2016-05-26 17:02:56 +00:00
PowerPC [PowerPC] Run reg2mem on tests to simplify them. 2016-06-02 18:02:50 +00:00
SPARC [Sparc] Allow passing of empty structs. 2016-06-01 08:48:56 +00:00
SystemZ [SystemZ] Fix register ordering for BinaryRRF instructions 2016-05-18 13:24:57 +00:00
Thumb ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
Thumb2 ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
WebAssembly [WebAssembly] Emit type signatures for declared functions 2016-06-03 18:34:36 +00:00
WinEH
X86 [X86][AVX512] Fixed 512-bit vector nontemporal load alignment 2016-06-03 14:12:43 +00:00
XCore