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6440707b6f
1. teach SimplifySetCC that '(srl (ctlz x), 5) == 0' is really x != 0. 2. Teach visitSELECT_CC to use SimplifySetCC instead of calling it and ignoring the result. This allows us to compile: bool %test(ulong %x) { %tmp = setlt ulong %x, 4294967296 ret bool %tmp } to: _test: cntlzw r2, r3 cmplwi cr0, r3, 1 srwi r2, r2, 5 li r3, 0 beq cr0, LBB1_2 ; LBB1_1: ; mr r3, r2 LBB1_2: ; blr instead of: _test: addi r2, r3, -1 cntlzw r2, r2 cntlzw r3, r3 srwi r2, r2, 5 cmplwi cr0, r2, 0 srwi r2, r3, 5 li r3, 0 bne cr0, LBB1_2 ; LBB1_1: ; mr r3, r2 LBB1_2: ; blr This isn't wonderful, but it's an improvement. llvm-svn: 30513 |
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.. | ||
SelectionDAG | ||
AsmPrinter.cpp | ||
BranchFolding.cpp | ||
DwarfWriter.cpp | ||
ELFWriter.cpp | ||
IntrinsicLowering.cpp | ||
LiveInterval.cpp | ||
LiveIntervalAnalysis.cpp | ||
LiveVariables.cpp | ||
LLVMTargetMachine.cpp | ||
MachineBasicBlock.cpp | ||
MachineDebugInfo.cpp | ||
MachineFunction.cpp | ||
MachineInstr.cpp | ||
MachinePassRegistry.cpp | ||
MachOWriter.cpp | ||
Makefile | ||
Passes.cpp | ||
PHIElimination.cpp | ||
PhysRegTracker.h | ||
PrologEpilogInserter.cpp | ||
RegAllocLinearScan.cpp | ||
RegAllocLocal.cpp | ||
RegAllocSimple.cpp | ||
TwoAddressInstructionPass.cpp | ||
UnreachableBlockElim.cpp | ||
VirtRegMap.cpp | ||
VirtRegMap.h |