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5d88cb6cf6
ARM seems to prefer that long literals be formed from their little end in order to promote the fusion of the instrs pairs MOV/MOVK and MOVK/MOVK on Cortex A57 and others (v. "Cortex A57 Software Optimisation Guide", section 4.14). Differential revision: https://reviews.llvm.org/D28697 llvm-svn: 292422
24 lines
688 B
LLVM
24 lines
688 B
LLVM
; RUN: llc -mtriple=arm64-darwin-unknown < %s | FileCheck %s
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%T = type { i32, i32, i32, i32 }
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; Test if the constant base address gets only materialized once.
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define i32 @test1() nounwind {
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; CHECK-LABEL: test1
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; CHECK: mov w8, #49152
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; CHECK-NEXT: movk w8, #1039, lsl #16
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; CHECK-NEXT: ldp w9, w10, [x8, #4]
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; CHECK: ldr w8, [x8, #12]
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%at = inttoptr i64 68141056 to %T*
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%o1 = getelementptr %T, %T* %at, i32 0, i32 1
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%t1 = load i32, i32* %o1
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%o2 = getelementptr %T, %T* %at, i32 0, i32 2
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%t2 = load i32, i32* %o2
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%a1 = add i32 %t1, %t2
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%o3 = getelementptr %T, %T* %at, i32 0, i32 3
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%t3 = load i32, i32* %o3
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%a2 = add i32 %a1, %t3
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ret i32 %a2
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}
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