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a0090a0113
Also add glc bit to the scalar loads since they exist on VI and change the caching behavior. This currently has an assembler bug where the glc bit is incorrectly accepted on SI/CI which do not have it. llvm-svn: 285463
40 lines
1.8 KiB
ArmAsm
40 lines
1.8 KiB
ArmAsm
// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSI %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck -check-prefix=NOSI %s
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s_dcache_wb
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// VI: s_dcache_wb ; encoding: [0x00,0x00,0x84,0xc0,0x00,0x00,0x00,0x00]
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// NOSI: error: instruction not supported on this GPU
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s_dcache_wb_vol
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// VI: s_dcache_wb_vol ; encoding: [0x00,0x00,0x8c,0xc0,0x00,0x00,0x00,0x00]
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// NOSI: error: instruction not supported on this GPU
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s_memrealtime s[4:5]
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// VI: s_memrealtime s[4:5] ; encoding: [0x00,0x01,0x94,0xc0,0x00,0x00,0x00,0x00]
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// NOSI: error: instruction not supported on this GPU
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// FIXME: Should error about instruction on GPU
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s_store_dword s1, s[2:3], 0xfc
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// VI: s_store_dword s1, s[2:3], 0xfc ; encoding: [0x41,0x00,0x42,0xc0,0xfc,0x00,0x00,0x00]
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// NOSI: error: instruction not supported on this GPU
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s_store_dword s1, s[2:3], 0xfc glc
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// VI: s_store_dword s1, s[2:3], 0xfc glc ; encoding: [0x41,0x00,0x43,0xc0,0xfc,0x00,0x00,0x00]
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// NOSI: error: invalid operand for instruction
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s_store_dword s1, s[2:3], s4
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// VI: s_store_dword s1, s[2:3], s4 ; encoding: [0x41,0x00,0x40,0xc0,0x04,0x00,0x00,0x00]
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// NOSI: error: instruction not supported on this GPU
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s_store_dword s1, s[2:3], s4 glc
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// VI: s_store_dword s1, s[2:3], s4 glc ; encoding: [0x41,0x00,0x41,0xc0,0x04,0x00,0x00,0x00]
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// NOSI: error: invalid operand for instruction
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// FIXME: Should error on SI instead of silently ignoring glc
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s_load_dword s1, s[2:3], 0xfc glc
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// VI: s_load_dword s1, s[2:3], 0xfc glc ; encoding: [0x41,0x00,0x03,0xc0,0xfc,0x00,0x00,0x00]
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s_load_dword s1, s[2:3], s4 glc
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// VI: s_load_dword s1, s[2:3], s4 glc ; encoding: [0x41,0x00,0x01,0xc0,0x04,0x00,0x00,0x00]
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