Akira Hatanaka aaa3035d45 [mips] Add option -mno-ldc1-sdc1. ... This option is used when the user wants to avoid emitting double precision FP loads and stores. Double precision FP loads and stores are expanded to single precision instructions after register allocation. llvm-svn: 181718		2013-05-13 18:23:35 +00:00
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CodeGen	[mips] Add option -mno-ldc1-sdc1.	2013-05-13 18:23:35 +00:00
DebugInfo	Give the test from r181632 a target triple.	2013-05-10 22:14:39 +00:00
ExecutionEngine	XFAIL this test for mingw too.	2013-05-13 00:18:24 +00:00
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MC	The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instructions when they are used to write to the APSR. In this case, the destination operand should be APSR_nzcv, and the encoding of the target should be 0b1111 (same as for PC). In pre-UAL syntax, this form used the PC register as a textual target. This is still allowed for backward compatibility.	2013-05-13 14:10:04 +00:00
Object	Change getRelocationAdditionalInfo to be ELF only.	2013-05-09 03:39:05 +00:00
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Transforms	SLPVectorizer: Fix a bug in the code that generates extracts for values with multiple users.	2013-05-12 22:58:45 +00:00
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