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864446cd55
1. Added ':' to CHECK-LABELs 2. Added more CHECKs 3. Added CHECK-NEXTs 4. Added verbose hex immediate comments to CHECKs llvm-svn: 214921
57 lines
1.6 KiB
LLVM
57 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=armv7-eabi -float-abi=hard -mcpu=cortex-a8 | FileCheck %s
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; CHECK-LABEL: test:
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; CHECK: vabs.f32 q0, q0
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define <4 x float> @test(<4 x float> %a) {
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%foo = call <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
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ret <4 x float> %foo
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}
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declare <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
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; CHECK-LABEL: test2:
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; CHECK: vabs.f32 d0, d0
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define <2 x float> @test2(<2 x float> %a) {
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%foo = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
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ret <2 x float> %foo
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}
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declare <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
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; No constant pool loads or vector ops are needed for the fabs of a
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; bitcasted integer constant; we should just return integer constants
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; that have the sign bits turned off.
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;
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; So instead of something like this:
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; mvn r0, #0
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; mov r1, #0
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; vmov d16, r1, r0
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; vabs.f32 d16, d16
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; vmov r0, r1, d16
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; bx lr
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;
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; We should generate:
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; mov r0, #0
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; mvn r1, #-2147483648
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; bx lr
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define i64 @fabs_v2f32_1() {
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; CHECK-LABEL: fabs_v2f32_1:
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; CHECK: mvn r1, #-2147483648
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; CHECK: bx lr
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; CHECK-NOT: vabs
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%bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000
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%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
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%ret = bitcast <2 x float> %fabs to i64
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ret i64 %ret
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}
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define i64 @fabs_v2f32_2() {
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; CHECK-LABEL: fabs_v2f32_2:
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; CHECK: mvn r0, #-2147483648
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; CHECK: bx lr
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; CHECK-NOT: vabs
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%bitcast = bitcast i64 4294967295 to <2 x float> ; 0x0000_0000_FFFF_FFFF
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%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
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%ret = bitcast <2 x float> %fabs to i64
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ret i64 %ret
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}
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