mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 18:54:02 +01:00
ec787a7fca
This sets trackLivenessAfterRegAlloc on AVRRegisterInfo.
Most existing targets set this flag. Without it, specific IR inputs
cause LLVM to fail with:
Assertion failed: (getParent()->getProperties().hasProperty( MachineFunctionProperties::Property::TracksLiveness) &&
"Liveness information is accurate"), function livein_begin
file MachineBasicBlock.cpp, line 1354.
With this commit, this no longer happens.
Patch by Peter Nimmervoll.
llvm-svn: 334409
337 lines
8.0 KiB
LLVM
337 lines
8.0 KiB
LLVM
; RUN: llc < %s -march=avr -mcpu=avr5 | FileCheck %s
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; The original reason for this failure is that the BranchFolderPass disables liveness
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; tracking unless you override the trackLivenessAfterRegAlloc function and return true.
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; This probably should be the default because all main targets do this (maybe some gpu targets don't).
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; More info can be found at https://github.com/avr-rust/rust/issues/99.
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%struct.quux = type { [0 x i8], i64, [0 x i8], i64, [0 x i8], i64, [0 x i8], i64, [0 x i8] }
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%struct.foo = type { [0 x i8], %struct.blam, [0 x i8], i32, [0 x i8], i32, [0 x i8], i8, [0 x i8], %struct.blam.0, [0 x i8], %struct.blam.0, [0 x i8] }
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%struct.blam = type {}
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%struct.blam.0 = type { [0 x i8], i8, [2 x i8] }
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%struct.quux.1 = type { [0 x i8], %struct.wombat, [0 x i8], i64, [0 x i8], i64, [0 x i8], i16, [0 x i8], %struct.quux, [0 x i8], i64, [0 x i8], i16, [0 x i8] }
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%struct.wombat = type {}
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declare zeroext i1 @zot(%struct.quux*, %struct.foo*)
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declare void @wibble(i16, i16)
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; CHECK-LABEL: main
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define zeroext i1 @main(%struct.quux.1* %arg, %struct.foo* %arg62) {
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bb:
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%tmp63 = alloca [128 x i8], align 1
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%tmp = getelementptr inbounds %struct.quux.1, %struct.quux.1* %arg, i16 0, i32 5
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%tmp64 = getelementptr inbounds %struct.quux.1, %struct.quux.1* %arg, i16 0, i32 13
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%tmp65 = bitcast %struct.foo* %arg62 to i32*
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%tmp66 = icmp eq i32 undef, 0
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br i1 undef, label %bb92, label %bb67
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bb67:
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br i1 %tmp66, label %bb83, label %bb68
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bb68:
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%tmp69 = load i64, i64* null, align 1
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br label %bb70
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bb70:
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%tmp71 = phi i16 [ 128, %bb68 ], [ %tmp79, %bb70 ]
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%tmp72 = phi i64 [ %tmp69, %bb68 ], [ %tmp74, %bb70 ]
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%tmp73 = getelementptr inbounds i8, i8* null, i16 -1
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%tmp74 = lshr i64 %tmp72, 4
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%tmp75 = trunc i64 %tmp72 to i8
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%tmp76 = and i8 %tmp75, 15
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%tmp77 = add nuw nsw i8 %tmp76, 87
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%tmp78 = select i1 undef, i8 undef, i8 %tmp77
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store i8 %tmp78, i8* %tmp73, align 1
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%tmp79 = add nsw i16 %tmp71, -1
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%tmp80 = icmp eq i8* %tmp73, null
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%tmp81 = or i1 undef, %tmp80
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br i1 %tmp81, label %bb82, label %bb70
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bb82:
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call void @wibble(i16 %tmp79, i16 128)
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unreachable
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bb83:
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%tmp84 = icmp eq i32 undef, 0
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%tmp85 = load i64, i64* null, align 1
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br i1 %tmp84, label %bb87, label %bb86
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bb86:
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unreachable
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bb87:
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br label %bb88
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bb88:
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%tmp89 = phi i64 [ %tmp90, %bb88 ], [ %tmp85, %bb87 ]
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%tmp90 = udiv i64 %tmp89, 10000
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%tmp91 = icmp ugt i64 %tmp89, 99999999
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br label %bb88
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bb92:
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br label %bb93
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bb93:
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br i1 undef, label %bb95, label %bb94
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bb94:
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unreachable
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bb95:
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br label %bb96
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bb96:
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%tmp97 = phi i64 [ %tmp98, %bb96 ], [ undef, %bb95 ]
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%tmp98 = udiv i64 %tmp97, 10000
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%tmp99 = icmp ugt i64 %tmp97, 99999999
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br i1 %tmp99, label %bb96, label %bb100
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bb100:
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br label %bb101
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bb101:
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%tmp102 = and i32 undef, 16
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%tmp103 = icmp eq i32 %tmp102, 0
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br i1 undef, label %bb130, label %bb104
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bb104:
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br i1 %tmp103, label %bb117, label %bb105
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bb105:
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br label %bb106
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bb106:
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%tmp107 = phi i16 [ 128, %bb105 ], [ %tmp113, %bb106 ]
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%tmp108 = phi i64 [ undef, %bb105 ], [ %tmp111, %bb106 ]
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%tmp109 = phi i8* [ undef, %bb105 ], [ %tmp110, %bb106 ]
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%tmp110 = getelementptr inbounds i8, i8* %tmp109, i16 -1
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%tmp111 = lshr i64 %tmp108, 4
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%tmp112 = trunc i64 %tmp108 to i8
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%tmp113 = add nsw i16 %tmp107, -1
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%tmp114 = icmp eq i8* %tmp110, null
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%tmp115 = or i1 undef, %tmp114
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br i1 %tmp115, label %bb116, label %bb106
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bb116:
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call void @wibble(i16 %tmp113, i16 128)
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unreachable
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bb117:
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%tmp118 = load i64, i64* %tmp, align 1
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br i1 undef, label %bb120, label %bb119
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bb119:
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unreachable
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bb120:
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%tmp121 = icmp ugt i64 %tmp118, 9999
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br i1 %tmp121, label %bb122, label %bb127
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bb122:
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br label %bb123
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bb123:
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%tmp124 = phi i64 [ %tmp125, %bb123 ], [ %tmp118, %bb122 ]
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%tmp125 = udiv i64 %tmp124, 10000
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%tmp126 = icmp ugt i64 %tmp124, 99999999
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br label %bb123
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bb127:
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%tmp128 = load i32, i32* %tmp65, align 1
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%tmp129 = icmp eq i32 undef, 0
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br label %bb162
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bb130:
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br i1 %tmp103, label %bb142, label %bb131
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bb131:
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br label %bb132
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bb132:
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%tmp133 = phi i64 [ undef, %bb131 ], [ %tmp134, %bb132 ]
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%tmp134 = lshr i64 %tmp133, 4
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%tmp135 = trunc i64 %tmp133 to i8
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%tmp136 = and i8 %tmp135, 15
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%tmp137 = add nuw nsw i8 %tmp136, 87
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%tmp138 = select i1 undef, i8 undef, i8 %tmp137
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store i8 %tmp138, i8* undef, align 1
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%tmp139 = icmp eq i8* undef, null
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%tmp140 = or i1 undef, %tmp139
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br i1 %tmp140, label %bb141, label %bb132
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bb141:
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unreachable
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bb142:
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%tmp143 = icmp eq i32 undef, 0
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%tmp144 = load i64, i64* %tmp, align 1
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br i1 %tmp143, label %bb156, label %bb145
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bb145:
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br label %bb146
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bb146:
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%tmp147 = phi i16 [ 128, %bb145 ], [ %tmp151, %bb146 ]
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%tmp148 = phi i64 [ %tmp144, %bb145 ], [ %tmp150, %bb146 ]
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%tmp149 = getelementptr inbounds i8, i8* null, i16 -1
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%tmp150 = lshr i64 %tmp148, 4
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%tmp151 = add nsw i16 %tmp147, -1
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%tmp152 = icmp eq i64 %tmp150, 0
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%tmp153 = icmp eq i8* %tmp149, null
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%tmp154 = or i1 %tmp152, %tmp153
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br i1 %tmp154, label %bb155, label %bb146
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bb155:
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call void @wibble(i16 %tmp151, i16 128)
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unreachable
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bb156:
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br label %bb157
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bb157:
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%tmp158 = phi i64 [ %tmp159, %bb157 ], [ %tmp144, %bb156 ]
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%tmp159 = udiv i64 %tmp158, 10000
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%tmp160 = icmp ugt i64 %tmp158, 99999999
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br i1 %tmp160, label %bb157, label %bb161
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bb161:
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unreachable
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bb162:
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br i1 %tmp129, label %bb164, label %bb163
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bb163:
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unreachable
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bb164:
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%tmp165 = and i32 %tmp128, 32
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%tmp166 = icmp eq i32 %tmp165, 0
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br i1 %tmp166, label %bb169, label %bb167
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bb167:
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br label %bb168
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bb168:
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br label %bb168
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bb169:
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br label %bb170
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bb170:
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br i1 undef, label %bb172, label %bb171
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bb171:
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store i32 0, i32* undef, align 1
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call void @llvm.memcpy.p0i8.p0i8.i16(i8* align 1 undef, i8* align 1 null, i16 3, i1 false)
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call void @llvm.memcpy.p0i8.p0i8.i16(i8* align 1 undef, i8* align 1 null, i16 3, i1 false)
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br label %bb214
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bb172:
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%tmp173 = call zeroext i1 @zot(%struct.quux* noalias nonnull readonly dereferenceable(32) undef, %struct.foo* nonnull dereferenceable(15) %arg62)
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br i1 %tmp173, label %bb214, label %bb174
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bb174:
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%tmp175 = load i32, i32* %tmp65, align 1
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%tmp176 = icmp eq i32 undef, 0
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br label %bb177
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bb177:
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br i1 %tmp176, label %bb190, label %bb178
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bb178:
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%tmp179 = getelementptr inbounds [128 x i8], [128 x i8]* %tmp63, i16 0, i16 0
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br label %bb180
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bb180:
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%tmp181 = phi i64 [ 0, %bb178 ], [ %tmp182, %bb180 ]
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%tmp182 = lshr i64 %tmp181, 4
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%tmp183 = trunc i64 %tmp181 to i8
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%tmp184 = and i8 %tmp183, 15
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%tmp185 = add nuw nsw i8 %tmp184, 87
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%tmp186 = select i1 false, i8 0, i8 %tmp185
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store i8 %tmp186, i8* null, align 1
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%tmp187 = icmp eq i8* null, %tmp179
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%tmp188 = or i1 undef, %tmp187
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br i1 %tmp188, label %bb189, label %bb180
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bb189:
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call void @wibble(i16 0, i16 128)
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unreachable
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bb190:
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%tmp191 = and i32 %tmp175, 32
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%tmp192 = icmp eq i32 %tmp191, 0
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br i1 %tmp192, label %bb201, label %bb193
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bb193:
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br label %bb194
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bb194:
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%tmp195 = phi i64 [ 0, %bb193 ], [ %tmp196, %bb194 ]
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%tmp196 = lshr i64 %tmp195, 4
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%tmp197 = add nsw i16 0, -1
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%tmp198 = icmp eq i64 %tmp196, 0
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%tmp199 = or i1 %tmp198, undef
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br i1 %tmp199, label %bb200, label %bb194
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bb200:
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call void @wibble(i16 %tmp197, i16 128)
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unreachable
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bb201:
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br i1 undef, label %bb202, label %bb207
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bb202:
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br label %bb203
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bb203:
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%tmp204 = phi i64 [ %tmp205, %bb203 ], [ 0, %bb202 ]
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%tmp205 = udiv i64 %tmp204, 10000
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%tmp206 = icmp ugt i64 %tmp204, 99999999
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br i1 %tmp206, label %bb203, label %bb207
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bb207:
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br label %bb208
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bb208:
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store i16* %tmp64, i16** undef, align 1
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%tmp209 = load i32, i32* %tmp65, align 1
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%tmp210 = icmp eq i32 undef, 0
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%tmp211 = and i32 %tmp209, 16
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%tmp212 = icmp eq i32 %tmp211, 0
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br i1 %tmp210, label %bb215, label %bb213
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bb213:
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unreachable
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bb214:
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br label %bb221
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bb215:
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br i1 %tmp212, label %bb220, label %bb216
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bb216:
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br label %bb217
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bb217:
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br i1 undef, label %bb218, label %bb219
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bb218:
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unreachable
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bb219:
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br label %bb221
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bb220:
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unreachable
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bb221:
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store %struct.quux.1* %arg, %struct.quux.1** undef, align 1
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ret i1 undef
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}
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declare void @llvm.memcpy.p0i8.p0i8.i16(i8* nocapture writeonly, i8* nocapture readonly, i16, i1)
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