mirror of
https://github.com/RPCS3/llvm-mirror.git
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309 lines
6.3 KiB
LLVM
309 lines
6.3 KiB
LLVM
; RUN: llc < %s -march=avr | FileCheck %s
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; Optimize for speed.
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; CHECK-LABEL: shift_i8_i8_speed
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define i8 @shift_i8_i8_speed(i8 %a, i8 %b) {
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; CHECK: dec r22
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; CHECK-NEXT: brmi .LBB0_2
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; CHECK-NEXT: .LBB0_1:
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: dec r22
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; CHECK-NEXT: brpl .LBB0_1
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; CHECK-NEXT: .LBB0_2:
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; CHECK-NEXT: ret
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%result = shl i8 %a, %b
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ret i8 %result
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}
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; Optimize for size (producing slightly smaller code).
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; CHECK-LABEL: shift_i8_i8_size
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define i8 @shift_i8_i8_size(i8 %a, i8 %b) optsize {
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; CHECK: .LBB1_1:
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; CHECK-NEXT: dec r22
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; CHECK-NEXT: brmi .LBB1_3
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; CHECK: lsl r24
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; CHECK-NEXT: rjmp .LBB1_1
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; CHECK-NEXT: .LBB1_3:
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; CHECK-NEXT: ret
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%result = shl i8 %a, %b
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ret i8 %result
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}
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; CHECK-LABEL: shift_i16_i16
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define i16 @shift_i16_i16(i16 %a, i16 %b) {
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; CHECK: dec r22
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; CHECK-NEXT: brmi .LBB2_2
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; CHECK-NEXT: .LBB2_1:
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: dec r22
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; CHECK-NEXT: brpl .LBB2_1
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; CHECK-NEXT: .LBB2_2:
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; CHECK-NEXT: ret
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%result = shl i16 %a, %b
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ret i16 %result
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}
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; CHECK-LABEL: shift_i64_i64
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define i64 @shift_i64_i64(i64 %a, i64 %b) {
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; CHECK: call __ashldi3
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%result = shl i64 %a, %b
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ret i64 %result
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}
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define i8 @lsl_i8_1(i8 %a) {
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; CHECK-LABEL: lsl_i8_1:
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; CHECK: lsl r24
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%res = shl i8 %a, 1
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ret i8 %res
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}
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define i8 @lsl_i8_2(i8 %a) {
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; CHECK-LABEL: lsl_i8_2:
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; CHECK: lsl r24
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; CHECK-NEXT: lsl r24
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%res = shl i8 %a, 2
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ret i8 %res
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}
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define i8 @lsl_i8_3(i8 %a) {
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; CHECK-LABEL: lsl_i8_3:
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; CHECK: lsl r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: lsl r24
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%res = shl i8 %a, 3
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ret i8 %res
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}
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define i8 @lsl_i8_4(i8 %a) {
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; CHECK-LABEL: lsl_i8_4:
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; CHECK: swap r24
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; CHECK-NEXT: andi r24, -16
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%res = shl i8 %a, 4
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ret i8 %res
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}
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define i8 @lsl_i8_5(i8 %a) {
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; CHECK-LABEL: lsl_i8_5:
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; CHECK: swap r24
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; CHECK-NEXT: andi r24, -16
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; CHECK-NEXT: lsl r24
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%res = shl i8 %a, 5
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ret i8 %res
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}
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define i8 @lsl_i8_6(i8 %a) {
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; CHECK-LABEL: lsl_i8_6:
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; CHECK: swap r24
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; CHECK-NEXT: andi r24, -16
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: lsl r24
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%res = shl i8 %a, 6
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ret i8 %res
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}
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define i8 @lsr_i8_1(i8 %a) {
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; CHECK-LABEL: lsr_i8_1:
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; CHECK: lsr r24
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%res = lshr i8 %a, 1
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ret i8 %res
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}
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define i8 @lsr_i8_2(i8 %a) {
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; CHECK-LABEL: lsr_i8_2:
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; CHECK: lsr r24
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; CHECK-NEXT: lsr r24
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%res = lshr i8 %a, 2
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ret i8 %res
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}
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define i8 @lsr_i8_3(i8 %a) {
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; CHECK-LABEL: lsr_i8_3:
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; CHECK: lsr r24
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: lsr r24
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%res = lshr i8 %a, 3
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ret i8 %res
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}
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define i8 @lsr_i8_4(i8 %a) {
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; CHECK-LABEL: lsr_i8_4:
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; CHECK: swap r24
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; CHECK-NEXT: andi r24, 15
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%res = lshr i8 %a, 4
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ret i8 %res
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}
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define i8 @lsr_i8_5(i8 %a) {
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; CHECK-LABEL: lsr_i8_5:
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; CHECK: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: lsr r24
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%res = lshr i8 %a, 5
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ret i8 %res
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}
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define i8 @lsr_i8_6(i8 %a) {
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; CHECK-LABEL: lsr_i8_6:
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; CHECK: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: lsr r24
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%res = lshr i8 %a, 6
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ret i8 %res
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}
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define i8 @lsl_i8_7(i8 %a) {
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; CHECK-LABEL: lsl_i8_7
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; CHECK: ror r24
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; CHECK-NEXT: clr r24
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; CHECK-NEXT: ror r24
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%result = shl i8 %a, 7
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ret i8 %result
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}
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define i8 @lsr_i8_7(i8 %a) {
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; CHECK-LABEL: lsr_i8_7
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; CHECK: rol r24
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; CHECK-NEXT: clr r24
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; CHECK-NEXT: rol r24
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%result = lshr i8 %a, 7
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ret i8 %result
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}
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define i8 @asr_i8_7(i8 %a) {
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; CHECK-LABEL: asr_i8_7
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; CHECK: lsl r24
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; CHECK-NEXT: sbc r24, r24
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%result = ashr i8 %a, 7
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ret i8 %result
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}
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define i16 @lsl_i16_5(i16 %a) {
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; CHECK-LABEL: lsl_i16_5
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; CHECK: swap r25
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r25, 240
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; CHECK-NEXT: eor r25, r24
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; CHECK-NEXT: andi r24, 240
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; CHECK-NEXT: eor r25, r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: ret
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%result = shl i16 %a, 5
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ret i16 %result
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}
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define i16 @lsl_i16_6(i16 %a, i16 %b, i16 %c, i16 %d, i16 %e, i16 %f) {
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; CHECK-LABEL: lsl_i16_6
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; CHECK: mov r24, r14
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; CHECK-NEXT: mov r25, r15
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; CHECK-NEXT: swap r25
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r25, 240
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; CHECK-NEXT: eor r25, r24
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; CHECK-NEXT: andi r24, 240
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; CHECK-NEXT: eor r25, r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: ret
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%result = shl i16 %f, 6
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ret i16 %result
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}
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define i16 @lsl_i16_9(i16 %a) {
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; CHECK-LABEL: lsl_i16_9
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; CHECK: mov r25, r24
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; CHECK-NEXT: clr r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: ret
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%result = shl i16 %a, 9
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ret i16 %result
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}
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define i16 @lsl_i16_13(i16 %a) {
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; CHECK-LABEL: lsl_i16_13
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; CHECK: mov r25, r24
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; CHECK-NEXT: swap r25
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; CHECK-NEXT: andi r25, 240
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; CHECK-NEXT: clr r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: ret
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%result = shl i16 %a, 13
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ret i16 %result
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}
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define i16 @lsr_i16_5(i16 %a) {
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; CHECK-LABEL: lsr_i16_5
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; CHECK: swap r25
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: eor r24, r25
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; CHECK-NEXT: andi r25, 15
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; CHECK-NEXT: eor r24, r25
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; CHECK-NEXT: lsr r25
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; CHECK-NEXT: ror r24
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; CHECK-NEXT: ret
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%result = lshr i16 %a, 5
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ret i16 %result
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}
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define i16 @lsr_i16_6(i16 %a, i16 %b, i16 %c, i16 %d, i16 %e, i16 %f) {
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; CHECK-LABEL: lsr_i16_6
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; CHECK: mov r24, r14
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; CHECK-NEXT: mov r25, r15
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; CHECK-NEXT: swap r25
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: eor r24, r25
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; CHECK-NEXT: andi r25, 15
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; CHECK-NEXT: eor r24, r25
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; CHECK-NEXT: lsr r25
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; CHECK-NEXT: ror r24
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; CHECK-NEXT: lsr r25
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; CHECK-NEXT: ror r24
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; CHECK-NEXT: ret
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%result = lshr i16 %f, 6
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ret i16 %result
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}
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define i16 @lsr_i16_9(i16 %a) {
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; CHECK-LABEL: lsr_i16_9
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; CHECK: mov r24, r25
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; CHECK-NEXT: clr r25
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; CHECK-NEXT: lsr r25
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; CHECK-NEXT: ror r24
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; CHECK-NEXT: ret
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%result = lshr i16 %a, 9
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ret i16 %result
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}
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define i16 @lsr_i16_13(i16 %a) {
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; CHECK-LABEL: lsr_i16_13
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; CHECK: mov r24, r25
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: clr r25
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; CHECK-NEXT: lsr r25
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; CHECK-NEXT: ror r24
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; CHECK-NEXT: ret
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%result = lshr i16 %a, 13
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ret i16 %result
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}
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define i16 @asr_i16_9(i16 %a) {
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; CHECK-LABEL: asr_i16_9
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; CHECK: mov r24, r25
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; CHECK-NEXT: lsl r25
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; CHECK-NEXT: sbc r25, r25
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; CHECK-NEXT: asr r25
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; CHECK-NEXT: ror r24
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; CHECK-NEXT: ret
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%result = ashr i16 %a, 9
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ret i16 %result
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}
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