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5f190b5e4e
In r143502, we renamed getHostTriple() to getDefaultTargetTriple() as part of work to allow the user to supply a different default target triple at configure time. This change also affected the JIT. However, it is inappropriate to use the default target triple in the JIT in most circumstances because this will not necessarily match the current architecture used by the process, leading to illegal instruction and other such errors at run time. Introduce the getProcessTriple() function for use in the JIT and its clients, and cause the JIT to use it. On architectures with a single bitness, the host and process triples are identical. On other architectures, the host triple represents the architecture of the host CPU, while the process triple represents the architecture used by the host CPU to interpret machine code within the current process. For example, when executing 32-bit code on a 64-bit Linux machine, the host triple may be 'x86_64-unknown-linux-gnu', while the process triple may be 'i386-unknown-linux-gnu'. This fixes JIT for the 32-on-64-bit (and vice versa) build on non-Apple platforms. Differential Revision: http://llvm-reviews.chandlerc.com/D254 llvm-svn: 172627
35 lines
1.1 KiB
LLVM
35 lines
1.1 KiB
LLVM
; RUN: %lli_mcjit %s > /dev/null
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; This testcase exposes a bug in the local register allocator where it runs out
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; of registers (due to too many overlapping live ranges), but then attempts to
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; use the ESP register (which is not allocatable) to hold a value.
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define i32 @main(i32 %A) {
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; ESP gets used again...
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%Ap2 = alloca i32, i32 %A ; <i32*> [#uses=11]
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; Produce lots of overlapping live ranges
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%B = add i32 %A, 1 ; <i32> [#uses=1]
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%C = add i32 %A, 2 ; <i32> [#uses=1]
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%D = add i32 %A, 3 ; <i32> [#uses=1]
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%E = add i32 %A, 4 ; <i32> [#uses=1]
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%F = add i32 %A, 5 ; <i32> [#uses=1]
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%G = add i32 %A, 6 ; <i32> [#uses=1]
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%H = add i32 %A, 7 ; <i32> [#uses=1]
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%I = add i32 %A, 8 ; <i32> [#uses=1]
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%J = add i32 %A, 9 ; <i32> [#uses=1]
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%K = add i32 %A, 10 ; <i32> [#uses=1]
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; Uses of all of the values
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store i32 %A, i32* %Ap2
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store i32 %B, i32* %Ap2
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store i32 %C, i32* %Ap2
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store i32 %D, i32* %Ap2
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store i32 %E, i32* %Ap2
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store i32 %F, i32* %Ap2
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store i32 %G, i32* %Ap2
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store i32 %H, i32* %Ap2
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store i32 %I, i32* %Ap2
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store i32 %J, i32* %Ap2
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store i32 %K, i32* %Ap2
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ret i32 0
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}
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