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ebbd053e6a
Not folding these cases tends to avoid partial register updates: sqrtss (%eax), %xmm0 Has a partial update of %xmm0, while movss (%eax), %xmm0 sqrtss %xmm0, %xmm0 Has a clobber of the high lanes immediately before the partial update, avoiding a potential stall. Given this, we only want to fold when optimizing for size. This is consistent with the patterns we already have for some of the fp/int converts, and in X86InstrInfo::foldMemoryOperandImpl() Differential Revision: http://reviews.llvm.org/D15741 llvm-svn: 256671
155 lines
4.7 KiB
LLVM
155 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX
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; Verify we fold loads into unary sse intrinsics only when optimizing for size
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define float @rcpss(float* %a) {
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; SSE-LABEL: rcpss:
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; SSE: # BB#0:
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; SSE-NEXT: movss (%rdi), %xmm0
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; SSE-NEXT: rcpss %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: rcpss:
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; AVX: # BB#0:
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; AVX-NEXT: vmovss (%rdi), %xmm0
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; AVX-NEXT: vrcpss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%ld = load float, float* %a
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%ins = insertelement <4 x float> undef, float %ld, i32 0
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%res = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %ins)
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%ext = extractelement <4 x float> %res, i32 0
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ret float %ext
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}
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define float @rsqrtss(float* %a) {
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; SSE-LABEL: rsqrtss:
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; SSE: # BB#0:
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; SSE-NEXT: movss (%rdi), %xmm0
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; SSE-NEXT: rsqrtss %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: rsqrtss:
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; AVX: # BB#0:
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; AVX-NEXT: vmovss (%rdi), %xmm0
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; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%ld = load float, float* %a
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%ins = insertelement <4 x float> undef, float %ld, i32 0
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%res = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %ins)
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%ext = extractelement <4 x float> %res, i32 0
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ret float %ext
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}
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define float @sqrtss(float* %a) {
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; SSE-LABEL: sqrtss:
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; SSE: # BB#0:
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; SSE-NEXT: movss (%rdi), %xmm0
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; SSE-NEXT: sqrtss %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: sqrtss:
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; AVX: # BB#0:
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; AVX-NEXT: vmovss (%rdi), %xmm0
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; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%ld = load float, float* %a
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%ins = insertelement <4 x float> undef, float %ld, i32 0
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%res = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %ins)
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%ext = extractelement <4 x float> %res, i32 0
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ret float %ext
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}
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define double @sqrtsd(double* %a) {
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; SSE-LABEL: sqrtsd:
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; SSE: # BB#0:
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; SSE-NEXT: movsd (%rdi), %xmm0
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; SSE-NEXT: sqrtsd %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: sqrtsd:
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; AVX: # BB#0:
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; AVX-NEXT: vmovsd (%rdi), %xmm0
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; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%ld = load double, double* %a
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%ins = insertelement <2 x double> undef, double %ld, i32 0
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%res = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %ins)
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%ext = extractelement <2 x double> %res, i32 0
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ret double %ext
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}
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define float @rcpss_size(float* %a) optsize {
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; SSE-LABEL: rcpss_size:
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; SSE: # BB#0:
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; SSE-NEXT: rcpss (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: rcpss_size:
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; AVX: # BB#0:
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; AVX-NEXT: vrcpss (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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%ld = load float, float* %a
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%ins = insertelement <4 x float> undef, float %ld, i32 0
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%res = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %ins)
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%ext = extractelement <4 x float> %res, i32 0
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ret float %ext
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}
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define float @rsqrtss_size(float* %a) optsize {
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; SSE-LABEL: rsqrtss_size:
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; SSE: # BB#0:
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; SSE-NEXT: rsqrtss (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: rsqrtss_size:
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; AVX: # BB#0:
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; AVX-NEXT: vrsqrtss (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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%ld = load float, float* %a
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%ins = insertelement <4 x float> undef, float %ld, i32 0
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%res = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %ins)
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%ext = extractelement <4 x float> %res, i32 0
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ret float %ext
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}
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define float @sqrtss_size(float* %a) optsize{
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; SSE-LABEL: sqrtss_size:
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; SSE: # BB#0:
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; SSE-NEXT: sqrtss (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: sqrtss_size:
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; AVX: # BB#0:
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; AVX-NEXT: vsqrtss (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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%ld = load float, float* %a
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%ins = insertelement <4 x float> undef, float %ld, i32 0
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%res = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %ins)
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%ext = extractelement <4 x float> %res, i32 0
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ret float %ext
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}
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define double @sqrtsd_size(double* %a) optsize {
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; SSE-LABEL: sqrtsd_size:
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; SSE: # BB#0:
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; SSE-NEXT: sqrtsd (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: sqrtsd_size:
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; AVX: # BB#0:
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; AVX-NEXT: vsqrtsd (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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%ld = load double, double* %a
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%ins = insertelement <2 x double> undef, double %ld, i32 0
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%res = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %ins)
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%ext = extractelement <2 x double> %res, i32 0
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ret double %ext
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}
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declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) nounwind readnone
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declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
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declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone
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declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone
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