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6b7c9ae783
The old implementation assumed LP64 which is broken for x32. Specifically, the MOVE8rm_NOREX and MOVE8mr_NOREX, when selected, would cause a 'Cannot emit physreg copy instruction' error message to be reported. This patch also enable the h-register*ll tests for x32. Differential Revision: http://reviews.llvm.org/D12336 Patch by João Porto llvm-svn: 247058
50 lines
1.3 KiB
LLVM
50 lines
1.3 KiB
LLVM
; RUN: llc -mattr=-bmi < %s -mtriple=x86_64-linux | FileCheck %s
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; RUN: llc -mattr=-bmi < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
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; LLVM creates virtual registers for values live across blocks
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; based on the type of the value. Make sure that the extracts
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; here use the GR64_NOREX register class for their result,
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; instead of plain GR64.
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; CHECK: foo:
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; CHECK: movzbl %{{[abcd]}}h, %e
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; CHECK: movzbl %{{[abcd]}}h, %e
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; CHECK: movzbl %{{[abcd]}}h, %e
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; CHECK: movzbl %{{[abcd]}}h, %e
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; CHECK: movzbl %{{[abcd]}}h, %e
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; CHECK: movzbl %{{[abcd]}}h, %e
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; CHECK: movzbl %{{[abcd]}}h, %e
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; CHECK: movzbl %{{[abcd]}}h, %e
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; CHECK: ret
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define i64 @foo(i64 %a, i64 %b, i64 %c, i64 %d,
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i64 %e, i64 %f, i64 %g, i64 %h) {
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%sa = lshr i64 %a, 8
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%A = and i64 %sa, 255
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%sb = lshr i64 %b, 8
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%B = and i64 %sb, 255
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%sc = lshr i64 %c, 8
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%C = and i64 %sc, 255
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%sd = lshr i64 %d, 8
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%D = and i64 %sd, 255
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%se = lshr i64 %e, 8
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%E = and i64 %se, 255
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%sf = lshr i64 %f, 8
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%F = and i64 %sf, 255
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%sg = lshr i64 %g, 8
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%G = and i64 %sg, 255
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%sh = lshr i64 %h, 8
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%H = and i64 %sh, 255
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br label %next
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next:
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%u = add i64 %A, %B
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%v = add i64 %C, %D
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%w = add i64 %E, %F
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%x = add i64 %G, %H
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%y = add i64 %u, %v
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%z = add i64 %w, %x
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%t = add i64 %y, %z
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ret i64 %t
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}
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