Ahmed Bougacha 6d1fcfb76b [ARM] Make f16 interleaved accesses expensive. ... There are no vldN/vstN f16 variants, even with +fullfp16. We could use the i16 variants, but, in practice, even with +fullfp16, the f16 sequence leading to the i16 shuffle usually gets scalarized. We'd need to improve our support for f16 codegen before getting there. Teach the cost model to consider f16 interleaved operations as expensive. Otherwise, we are all but guaranteed to end up with a large block of scalarized vector code. llvm-svn: 294819		2017-02-11 01:53:04 +00:00
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arm-ieee-vectorize.ll
arm-unroll.ll
gather-cost.ll	Second attempt at r285517.	2016-10-31 13:17:31 +00:00
gcc-examples.ll
interleaved_cost.ll	[ARM] Make f16 interleaved accesses expensive.	2017-02-11 01:53:04 +00:00
lit.local.cfg
mul-cast-vect.ll
vector_cast.ll	[Verifier] Add verification for TBAA metadata	2016-12-11 20:07:15 +00:00
width-detect.ll