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llvm-mirror/test/Transforms/CodeGenPrepare/AArch64
Jun Bum Lim 4f195c2484 [CodeGenPrep] Skip merging empty case blocks
This is recommit of r287553 after fixing the invalid loop info after eliminating an empty block and unit test failures in AVR and WebAssembly :

Summary: Merging an empty case block into the header block of switch could cause ISel to add COPY instructions in the header of switch, instead of the case block, if the case block is used as an incoming block of a PHI. This could potentially increase dynamic instructions, especially when the switch is in a loop. I added a test case which was reduced from the benchmark I was targetting.

Reviewers: t.p.northover, mcrosier, manmanren, wmi, joerg, davidxl

Subscribers: joerg, qcolombet, danielcdh, hfinkel, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D22696

llvm-svn: 289988
2016-12-16 20:38:39 +00:00
..
free-zext.ll Move free-zext.ll to llvm/test/Transforms/CodeGenPrepare/AArch64/ 2015-11-20 22:55:34 +00:00
lit.local.cfg
trunc-weird-user.ll
widen_switch.ll [CodeGenPrep] Skip merging empty case blocks 2016-12-16 20:38:39 +00:00