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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
79 lines
2.6 KiB
C++
79 lines
2.6 KiB
C++
//===--------------------- Pipeline.h ---------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements an ordered container of stages that simulate the
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/// pipeline of a hardware backend.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_MCA_PIPELINE_H
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#define LLVM_MCA_PIPELINE_H
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/MCA/HardwareUnits/Scheduler.h"
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#include "llvm/MCA/Stages/Stage.h"
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#include "llvm/Support/Error.h"
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namespace llvm {
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namespace mca {
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class HWEventListener;
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/// A pipeline for a specific subtarget.
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///
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/// It emulates an out-of-order execution of instructions. Instructions are
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/// fetched from a MCInst sequence managed by an initial 'Fetch' stage.
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/// Instructions are firstly fetched, then dispatched to the schedulers, and
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/// then executed.
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///
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/// This class tracks the lifetime of an instruction from the moment where
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/// it gets dispatched to the schedulers, to the moment where it finishes
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/// executing and register writes are architecturally committed.
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/// In particular, it monitors changes in the state of every instruction
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/// in flight.
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///
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/// Instructions are executed in a loop of iterations. The number of iterations
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/// is defined by the SourceMgr object, which is managed by the initial stage
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/// of the instruction pipeline.
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///
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/// The Pipeline entry point is method 'run()' which executes cycles in a loop
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/// until there are new instructions to dispatch, and not every instruction
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/// has been retired.
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///
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/// Internally, the Pipeline collects statistical information in the form of
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/// histograms. For example, it tracks how the dispatch group size changes
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/// over time.
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class Pipeline {
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Pipeline(const Pipeline &P) = delete;
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Pipeline &operator=(const Pipeline &P) = delete;
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/// An ordered list of stages that define this instruction pipeline.
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SmallVector<std::unique_ptr<Stage>, 8> Stages;
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std::set<HWEventListener *> Listeners;
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unsigned Cycles;
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Error runCycle();
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bool hasWorkToProcess();
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void notifyCycleBegin();
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void notifyCycleEnd();
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public:
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Pipeline() : Cycles(0) {}
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void appendStage(std::unique_ptr<Stage> S);
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/// Returns the total number of simulated cycles.
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Expected<unsigned> run();
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void addEventListener(HWEventListener *Listener);
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};
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} // namespace mca
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} // namespace llvm
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#endif // LLVM_MCA_PIPELINE_H
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