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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 03:53:04 +02:00
llvm-mirror/test/CodeGen
Nemanja Ivanovic 662ab414aa Fix for PR26690 take 2
This is what was meant to be in the initial commit to fix this bug. The
parens were missing. This commit also adds a test case for the bug and
has undergone full testing on PPC and X86.

llvm-svn: 261546
2016-02-22 18:04:00 +00:00
..
AArch64 [AArch64][ShrinkWrap] Fix bug in prolog clobbering live reg when shrink wrapping. 2016-02-19 18:27:32 +00:00
AMDGPU AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer 2016-02-20 00:37:25 +00:00
ARM [RegAllocFast] Properly track the physical register definitions on calls. 2016-02-20 00:32:29 +00:00
BPF
CPP
Generic Revert r261070, it caused PR26652 / PR26653. 2016-02-17 18:47:29 +00:00
Hexagon [Hexagon] Implement TLS support 2016-02-18 15:42:57 +00:00
Inputs
Mips [MC][ELF] Handle MIPS specific .sdata and .sbss directives 2016-02-11 06:45:54 +00:00
MIR When printing MIR, output to errs() rather than outs(). 2016-02-19 00:18:46 +00:00
MSP430
NVPTX Don't tail-duplicate blocks that contain convergent instructions. 2016-02-22 17:50:52 +00:00
PowerPC Fix for PR26690 take 2 2016-02-22 18:04:00 +00:00
SPARC [SPARC] Revamp AnalyzeBranch and add ReverseBranchCondition. 2016-01-13 04:44:14 +00:00
SystemZ [SystemZ] Fix ABI for i128 argument and return types 2016-02-19 14:10:21 +00:00
Thumb [MC] Use .p2align instead of .align 2016-01-26 00:03:25 +00:00
Thumb2 [SCEV] Try to reuse existing value during SCEV expansion 2016-02-04 01:27:38 +00:00
WebAssembly [WebAssembly] Properly ignore llvm.dbg.value instructions. 2016-02-22 17:45:20 +00:00
WinEH [WinEH] Optimize WinEH state stores 2016-02-17 18:37:11 +00:00
X86 [X86] More test updates to support fixup-byte-word-insts optimization 2016-02-22 01:27:56 +00:00
XCore [MC] Use .p2align instead of .align 2016-01-26 00:03:25 +00:00