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llvm-mirror/include/llvm/Target
Cullen Rhodes 6682076a17 [IR] Introduce llvm.experimental.vector.splice intrinsic
This patch introduces a new intrinsic @llvm.experimental.vector.splice
that constructs a vector of the same type as the two input vectors,
based on a immediate where the sign of the immediate distinguishes two
variants. A positive immediate specifies an index into the first vector
and a negative immediate specifies the number of trailing elements to
extract from the first vector.

For example:

  @llvm.experimental.vector.splice(<A,B,C,D>, <E,F,G,H>, 1) ==> <B, C, D, E>  ; index
  @llvm.experimental.vector.splice(<A,B,C,D>, <E,F,G,H>, -3) ==> <B, C, D, E> ; trailing element count

These intrinsics support both fixed and scalable vectors, where the
former is lowered to a shufflevector to maintain existing behaviour,
although while marked as experimental the recommended way to express
this operation for fixed-width vectors is to use shufflevector. For
scalable vectors where it is not possible to express a shufflevector
mask for this operation, a new ISD node has been implemented.

This is one of the named shufflevector intrinsics proposed on the
mailing-list in the RFC at [1].

Patch by Paul Walker and Cullen Rhodes.

[1] https://lists.llvm.org/pipermail/llvm-dev/2020-November/146864.html

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D94708
2021-03-09 10:44:22 +00:00
..
GlobalISel Reland [GlobalISel] Combine zext(trunc x) to x 2021-03-05 11:05:37 +01:00
CGPassBuilderOption.h [llvm] Fix header guards (NFC) 2021-02-05 21:02:06 -08:00
CodeGenCWrappers.h
GenericOpcodes.td [GlobalISel] Add G_ASSERT_SEXT 2021-02-17 13:10:34 -08:00
Target.td [M68k][TableGen](1/8) TableGen related changes 2021-03-08 12:30:56 -08:00
TargetCallingConv.td
TargetInstrPredicate.td
TargetIntrinsicInfo.h
TargetItinerary.td
TargetLoweringObjectFile.h Basic block sections should enable function sections implicitly. 2021-02-16 16:27:16 -08:00
TargetMachine.h Add -fbinutils-version= to gate ELF features on the specified binutils version 2021-01-26 12:28:23 -08:00
TargetOptions.h Add -fbinutils-version= to gate ELF features on the specified binutils version 2021-01-26 12:28:23 -08:00
TargetPfmCounters.td
TargetSchedule.td [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
TargetSelectionDAG.td [IR] Introduce llvm.experimental.vector.splice intrinsic 2021-03-09 10:44:22 +00:00