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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen
Dan Gohman 668a0ff5ef Fix a bug in x86's PreprocessForRMW logic that was exposed
by aggressive chain operand optimization. UpdateNodeOperands
does not modify the node in place if it would result in
a node identical to an existing node.

llvm-svn: 78297
2009-08-06 09:22:57 +00:00
..
Alpha Make promotion in operation legalization for SETCC work correctly. 2009-07-17 05:16:04 +00:00
ARM Add tests for new NEON vld instructions. 2009-08-06 00:38:31 +00:00
Blackfin Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs. 2009-08-05 03:53:14 +00:00
CBackend
CellSPU
CPP
Generic Remove the IA-64 backend. 2009-07-24 00:30:09 +00:00
Mips Pass target triple string in to TargetMachine constructor. 2009-08-03 04:03:51 +00:00
MSP430
PIC16 this passes. 2009-08-06 03:55:49 +00:00
PowerPC Revert r75663 (and r76805), as it is causing regressions on powerpc. 2009-07-23 00:09:46 +00:00
SPARC
SystemZ Add testcases for reg-mem arithemtics added recently 2009-08-05 17:04:32 +00:00
Thumb tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. 2009-07-28 07:38:35 +00:00
Thumb2 Disable stack coloring with register for now. It's not able to set kill markers. 2009-08-05 07:26:17 +00:00
X86 Fix a bug in x86's PreprocessForRMW logic that was exposed 2009-08-06 09:22:57 +00:00
XCore Add extra SEXT pattern. 2009-08-02 22:45:24 +00:00