Andrea Di Biagio ee5b4f2814 [documentation][llvm-mca] Update the documentation. ... Scheduling models can now describe processor register files and retire control units. This updates the existing documentation and the README file. llvm-svn: 329311		2018-04-05 16:42:32 +00:00
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bugpoint.rst
dsymutil.rst	[dsymutil] Upstream emitting of papertrail warnings.	2018-04-02 10:40:43 +00:00
FileCheck.rst
index.rst	Re-land r329156 "Add llvm-exegesis tool."	2018-04-04 11:37:06 +00:00
lit.rst
llc.rst	[MC] Fix -stack-size-section on ARM	2018-01-17 09:01:29 +00:00
lli.rst
llvm-ar.rst
llvm-as.rst
llvm-bcanalyzer.rst
llvm-build.rst
llvm-config.rst
llvm-cov.rst	[llvm-cov] Refactor "export" command implementation and add support for SOURCES.	2018-01-04 19:33:29 +00:00
llvm-diff.rst
llvm-dis.rst
llvm-dwarfdump.rst	Remove duplicate option from documentation.	2017-12-09 19:09:59 +00:00
llvm-exegesis.rst	Re-land r329156 "Add llvm-exegesis tool."	2018-04-04 11:37:06 +00:00
llvm-extract.rst
llvm-lib.rst
llvm-link.rst
llvm-mca.rst	[documentation][llvm-mca] Update the documentation.	2018-04-05 16:42:32 +00:00
llvm-nm.rst
llvm-pdbutil.rst
llvm-profdata.rst
llvm-readobj.rst
llvm-stress.rst
llvm-symbolizer.rst
opt.rst
tblgen.rst