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cc7d08e974
It allows regalloc pass to remove them by trivially assigning associated reg llvm-svn: 183336
32 lines
1.0 KiB
LLVM
32 lines
1.0 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; CHECK: @fadd_f32
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; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define void @fadd_f32() {
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%r0 = call float @llvm.R600.load.input(i32 0)
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%r1 = call float @llvm.R600.load.input(i32 1)
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%r2 = fadd float %r0, %r1
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call void @llvm.AMDGPU.store.output(float %r2, i32 0)
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ret void
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}
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declare float @llvm.R600.load.input(i32) readnone
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declare void @llvm.AMDGPU.store.output(float, i32)
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; CHECK: @fadd_v4f32
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; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define void @fadd_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
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%b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
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%a = load <4 x float> addrspace(1) * %in
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%b = load <4 x float> addrspace(1) * %b_ptr
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%result = fadd <4 x float> %a, %b
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store <4 x float> %result, <4 x float> addrspace(1)* %out
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ret void
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}
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