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66e7517610
The PPC::EXTSW instruction preserves the low 32 bits of its input, just like some of the x86 instructions. Use it to reduce register pressure when the low 32 bits have multiple uses. This requires a small change to PeepholeOptimizer since EXTSW takes a 64-bit input register. This is related to PR5997. llvm-svn: 158743
18 lines
583 B
LLVM
18 lines
583 B
LLVM
; RUN: llc -march=ppc64 < %s | FileCheck %s
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; Check that the peephole optimizer knows about sext and zext instructions.
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; CHECK: test1sext
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define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
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%C = add i64 %A, %B
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; CHECK: add [[SUM:r[0-9]+]], r3, r4
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%D = trunc i64 %C to i32
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%E = shl i64 %C, 32
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%F = ashr i64 %E, 32
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; CHECK: extsw [[EXT:r[0-9]+]], [[SUM]]
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store volatile i64 %F, i64 *%P2
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; CHECK: std [[EXT]]
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store volatile i32 %D, i32* %P
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; Reuse low bits of extended register, don't extend live range of SUM.
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; CHECK: stw [[EXT]]
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ret i32 %D
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}
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