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llvm-mirror/lib/Target/ARM/MCTargetDesc
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Jan Wen Voung fa15c02364 Have ARM ELF use correct reloc for "b" instr. 
The condition code didn't actually matter for arm "b" instructions,
unlike "bl".  It should just use the R_ARM_JUMP24 reloc.

llvm-svn: 158722
2012-06-19 16:03:02 +00:00
..
ARMAddressingModes.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
ARMAsmBackend.cpp Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bits 2012-05-03 22:41:56 +00:00
ARMBaseInfo.h ARM more NEON VLD/VST composite physical register refactoring. 2012-03-06 23:10:38 +00:00
ARMELFObjectWriter.cpp Have ARM ELF use correct reloc for "b" instr. 2012-06-19 16:03:02 +00:00
ARMFixupKinds.h Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch. 2012-03-30 09:15:32 +00:00
ARMMachObjectWriter.cpp Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch. 2012-03-30 09:15:32 +00:00
ARMMCAsmInfo.cpp Refactor data-in-code annotations. 2012-05-18 19:12:01 +00:00
ARMMCAsmInfo.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
ARMMCCodeEmitter.cpp Allow MCCodeEmitter access to the target MCRegisterInfo. 2012-05-15 17:35:52 +00:00
ARMMCExpr.cpp
ARMMCExpr.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
ARMMCTargetDesc.cpp - thumbv6 shouldn't imply +thumb2. Cortex-M0 doesn't suppport 32-bit Thumb2 2012-04-27 01:27:19 +00:00
ARMMCTargetDesc.h Allow MCCodeEmitter access to the target MCRegisterInfo. 2012-05-15 17:35:52 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile