Matthew Simpson c4d75790e7 [LV] Don't mark multi-use branch conditions uniform ... Previously, we marked the branch conditions of latch blocks uniform after vectorization if they were instructions contained in the loop. However, if a condition instruction has users other than the branch, it may not remain uniform. This patch ensures the conditions we mark uniform are only used by the branch. This should fix PR30627. Reference: https://llvm.org/bugs/show_bug.cgi?id=30627 llvm-svn: 283563		2016-10-07 15:20:13 +00:00
..
BBVectorize.cpp	IR: Remove Value::intersectOptionalDataWith, replace all calls with calls to Instruction::andIRFlags.	2016-09-07 23:39:04 +00:00
CMakeLists.txt	Add LoadStoreVectorizer pass	2016-06-30 23:11:38 +00:00
LLVMBuild.txt
LoadStoreVectorizer.cpp	Add new target hooks for LoadStoreVectorizer	2016-10-03 10:31:34 +00:00
LoopVectorize.cpp	[LV] Don't mark multi-use branch conditions uniform	2016-10-07 15:20:13 +00:00
SLPVectorizer.cpp	[SLPVectorizer] Fix for PR25748: reduction vectorization after loop	2016-10-07 09:39:22 +00:00
Vectorize.cpp	Add LoadStoreVectorizer pass	2016-06-30 23:11:38 +00:00