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AsmParser
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[AMDGPU] Assembler: Support DPP instructions.
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2016-03-09 12:29:31 +00:00 |
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Disassembler
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test commit
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2016-03-04 10:59:50 +00:00 |
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InstPrinter
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Fix build error due to unsigned compare >= 0 in r263008 (NFC)
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2016-03-09 14:58:23 +00:00 |
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MCTargetDesc
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
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TargetInfo
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
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Utils
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fix sanitizer-ppc64be-linux failure for r262804
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2016-03-06 15:13:54 +00:00 |
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AMDGPU.h
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AMDGPU: Insert two S_NOP instructions for every high level source statement.
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2016-03-03 03:53:29 +00:00 |
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AMDGPU.td
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AMDGPU: More bits of frame index are known to be zero
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2016-02-27 20:26:57 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU: Stop checking intrinsics not used by HSA for dispatch-ptr
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2016-01-30 05:10:59 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions
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2016-02-12 23:45:29 +00:00 |
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AMDGPUAsmPrinter.cpp
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AMDGPU: Don't use estimated stack size when we know the real stack size
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2016-03-01 04:58:20 +00:00 |
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AMDGPUAsmPrinter.h
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AMDGPU: Emit note directive for HSA even if there are no functions
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2016-01-12 17:18:17 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU/SI: Add support for non-void functions
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2016-01-13 17:23:04 +00:00 |
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AMDGPUFrameLowering.cpp
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AMDGPU: Fix old comments that mention AMDIL
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2016-01-20 21:22:21 +00:00 |
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AMDGPUFrameLowering.h
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AMDGPUInstrInfo.cpp
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AMDGPU: Move subtarget specific code out of AMDGPUInstrInfo.cpp
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2016-01-28 16:04:37 +00:00 |
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AMDGPUInstrInfo.h
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AMDGPU: Remove some purely R600 functions from AMDGPUInstrInfo
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2016-02-05 18:44:57 +00:00 |
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AMDGPUInstrInfo.td
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AMDGPU: Rename intrinsic to better match instruction name
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2016-02-13 01:03:00 +00:00 |
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AMDGPUInstructions.td
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AMDGPU: Match more med3 integer patterns
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2016-03-07 21:54:48 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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[llvm-tblgen] Avoid StringMatcher for GCC and MS builtin names
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2016-01-27 01:43:12 +00:00 |
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPU: Remove bfi and bfm intrinsics
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2016-02-08 19:06:01 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Simplify boolean conditional return statements
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2016-03-02 23:00:21 +00:00 |
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AMDGPUISelLowering.cpp
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AMDGPU: Move function only used by R600
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2016-03-07 21:10:13 +00:00 |
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AMDGPUISelLowering.h
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AMDGPU: Move function only used by R600
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2016-03-07 21:10:13 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU/SI: Add getShaderType() function to Utils/
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2015-12-15 16:26:16 +00:00 |
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
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Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"
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2016-02-22 20:49:58 +00:00 |
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AMDGPUMCInstLower.h
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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AMDGPUPromoteAlloca.cpp
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AMDGPU: Remove a fixme for ptrrtoint handling
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2016-03-07 21:12:46 +00:00 |
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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AMDGPU: More bits of frame index are known to be zero
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2016-02-27 20:26:57 +00:00 |
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AMDGPUSubtarget.h
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AMDGPU: More bits of frame index are known to be zero
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2016-02-27 20:26:57 +00:00 |
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AMDGPUTargetMachine.cpp
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AMDGPU: Insert two S_NOP instructions for every high level source statement.
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2016-03-03 03:53:29 +00:00 |
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AMDGPUTargetMachine.h
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AMDGPU: Fix ordering of CPU and FS parameters in TargetMachine constructors
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2016-02-05 18:29:17 +00:00 |
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AMDGPUTargetObjectFile.cpp
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AMDGPU/SI: Emit constant variables in the .hsatext section when targeting HSA
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2015-12-15 22:39:36 +00:00 |
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AMDGPUTargetObjectFile.h
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AMDGPUTargetTransformInfo.cpp
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AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions
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2016-02-12 23:45:29 +00:00 |
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AMDGPUTargetTransformInfo.h
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AMDGPU: Override getCFInstrCost
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2015-12-16 18:37:19 +00:00 |
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AMDILCFGStructurizer.cpp
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Bug 20810: Use report_fatal_error instead of unreachable
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2016-03-02 03:33:55 +00:00 |
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AMDKernelCodeT.h
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[AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields)
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2016-02-24 10:54:25 +00:00 |
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CaymanInstructions.td
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AMDGPU: Remove 24-bit intrinsics
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2016-01-29 10:05:16 +00:00 |
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CIInstructions.td
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[AMDGPU] Disassembler: Added basic disassembler for AMDGPU target
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2016-02-18 03:42:32 +00:00 |
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CMakeLists.txt
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AMDGPU: Insert two S_NOP instructions for every high level source statement.
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2016-03-03 03:53:29 +00:00 |
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EvergreenInstructions.td
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AMDGPU: Remove 24-bit intrinsics
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2016-01-29 10:05:16 +00:00 |
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LLVMBuild.txt
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[AMDGPU] Disassembler: Added basic disassembler for AMDGPU target
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2016-02-18 03:42:32 +00:00 |
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Processors.td
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AMDGPU/SI: Stoney has only 16 LDS banks
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2016-01-27 11:19:45 +00:00 |
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()...
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2016-02-22 21:30:15 +00:00 |
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600InstrFormats.td
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R600InstrInfo.cpp
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AMDGPU: Simplify boolean conditional return statements
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2016-03-02 23:00:21 +00:00 |
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R600InstrInfo.h
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CodeGen: TII: Take MachineInstr& in predicate API, NFC
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2016-02-23 02:46:52 +00:00 |
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R600Instructions.td
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AMDGPU: Rename intrinsic to better match instruction name
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2016-02-13 01:03:00 +00:00 |
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R600Intrinsics.td
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AMDGPU: Move AMDGPU intrinsics only used by R600
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2016-01-26 04:49:24 +00:00 |
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R600ISelLowering.cpp
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AMDGPU: Move function only used by R600
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2016-03-07 21:10:13 +00:00 |
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R600ISelLowering.h
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AMDGPU: Move function only used by R600
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2016-03-07 21:10:13 +00:00 |
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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AMDGPU: Simplify boolean conditional return statements
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2016-03-02 23:00:21 +00:00 |
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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AMDGPU: Rename some r600 intrinsics to use correct TargetPrefix
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2016-01-22 19:00:09 +00:00 |
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions
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2016-02-12 23:45:29 +00:00 |
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SIDefines.h
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[AMDGPU] Assembler: Support DPP instructions.
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2016-03-09 12:29:31 +00:00 |
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SIFixControlFlowLiveIntervals.cpp
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SIFixSGPRCopies.cpp
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AMDGPU/SI: Fold operands with sub-registers
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2016-01-07 17:10:29 +00:00 |
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SIFixSGPRLiveRanges.cpp
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AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions
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2016-02-12 23:45:29 +00:00 |
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SIFoldOperands.cpp
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AMDGPU: Fix passes depending on dominator tree for no reason
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2016-02-11 06:15:34 +00:00 |
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SIFrameLowering.cpp
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AMDGPU/SI: Don't try to move scratch wave offset when there are no free SGPRs
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2016-03-03 03:45:09 +00:00 |
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SIFrameLowering.h
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SIInsertNopsPass.cpp
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AMDGPU: Insert two S_NOP instructions for every high level source statement.
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2016-03-03 03:53:29 +00:00 |
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SIInsertWaits.cpp
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AMDGPU: Simplify boolean conditional return statements
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2016-03-02 23:00:21 +00:00 |
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SIInstrFormats.td
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[AMDGPU] Assembler: Support DPP instructions.
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2016-03-09 12:29:31 +00:00 |
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SIInstrInfo.cpp
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[TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.
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2016-03-09 16:00:35 +00:00 |
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SIInstrInfo.h
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[TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.
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2016-03-09 16:00:35 +00:00 |
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SIInstrInfo.td
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[AMDGPU] Assembler: Support DPP instructions.
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2016-03-09 12:29:31 +00:00 |
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SIInstructions.td
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[AMDGPU] Assembler: Fix s_setpc_b64
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2016-03-09 10:56:19 +00:00 |
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SIIntrinsics.td
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AMDGPU: Remove old sample intrinsics
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2016-01-26 04:38:08 +00:00 |
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SIISelLowering.cpp
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AMDGPU: More bits of frame index are known to be zero
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2016-02-27 20:26:57 +00:00 |
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SIISelLowering.h
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AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions
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2016-02-12 23:45:29 +00:00 |
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SILoadStoreOptimizer.cpp
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CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC
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2016-02-27 06:40:41 +00:00 |
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SILowerControlFlow.cpp
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AMDGPU: Set flat_scratch from flat_scratch_init reg
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2016-02-12 06:31:30 +00:00 |
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SILowerI1Copies.cpp
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AMDGPU: Fix passes depending on dominator tree for no reason
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2016-02-11 06:15:34 +00:00 |
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SIMachineFunctionInfo.cpp
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AMDGPU/SI: Add support for spiling SGPRs to scratch buffer
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2016-03-04 18:31:18 +00:00 |
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SIMachineFunctionInfo.h
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AMDGPU/SI: Add support for spiling SGPRs to scratch buffer
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2016-03-04 18:31:18 +00:00 |
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SIMachineScheduler.cpp
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[TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.
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2016-03-09 16:00:35 +00:00 |
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SIMachineScheduler.h
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RegisterPressure: Make liveness tracking subregister aware
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2016-01-20 00:23:26 +00:00 |
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SIRegisterInfo.cpp
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AMDGPU/SI: Add support for spiling SGPRs to scratch buffer
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2016-03-04 18:31:18 +00:00 |
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SIRegisterInfo.h
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AMDGPU/SI: Enable frame index scavenging during PrologEpilogueInserter
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2016-03-04 18:02:01 +00:00 |
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SIRegisterInfo.td
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AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions
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2016-02-12 23:45:29 +00:00 |
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SISchedule.td
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TableGen: Check scheduling models for completeness
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2016-03-01 20:03:21 +00:00 |
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SIShrinkInstructions.cpp
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AMDGPU: Simplify boolean conditional return statements
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2016-03-02 23:00:21 +00:00 |
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SITypeRewriter.cpp
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AMDGPU/SI: Fix crash when inline assembly is used in a graphics shader
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2016-01-06 22:01:04 +00:00 |
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VIInstrFormats.td
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[AMDGPU] Assembler: Support DPP instructions.
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2016-03-09 12:29:31 +00:00 |
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VIInstructions.td
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[AMDGPU] Assembler: Support DPP instructions.
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2016-03-09 12:29:31 +00:00 |
