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7e501cf4c3
This update was done with the following bash script:
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while read NAME; do
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if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
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fi
done
llvm-svn: 186280
220 lines
6.6 KiB
LLVM
220 lines
6.6 KiB
LLVM
; Test saving and restoring of call-saved GPRs.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; This function should require all GPRs, but no other spill slots. The caller
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; allocates room for the GPR save slots, so we shouldn't need to allocate any
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; extra space.
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;
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; The function only modifies the low 32 bits of each register, which in
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; itself would allow STM and LM to be used instead of STMG and LMG.
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; However, the ABI defines the offset of each register, so we always
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; use the 64-bit form.
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;
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; Use a different address for the final store, so that we can check that
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; %r15 isn't referenced again until after that.
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define void @f1(i32 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: stmg %r6, %r15, 48(%r15)
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; CHECK-NOT: %r15
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; CHECK: .cfi_offset %r6, -112
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; CHECK: .cfi_offset %r7, -104
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; CHECK: .cfi_offset %r8, -96
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; CHECK: .cfi_offset %r9, -88
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; CHECK: .cfi_offset %r10, -80
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; CHECK: .cfi_offset %r11, -72
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; CHECK: .cfi_offset %r12, -64
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; CHECK: .cfi_offset %r13, -56
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; CHECK: .cfi_offset %r14, -48
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; CHECK: .cfi_offset %r15, -40
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; ...main function body...
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; CHECK-NOT: %r15
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; CHECK: st {{.*}}, 4(%r2)
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; CHECK: lmg %r6, %r15, 48(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l3 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l6 = load volatile i32 *%ptr
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%l7 = load volatile i32 *%ptr
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%l8 = load volatile i32 *%ptr
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%l9 = load volatile i32 *%ptr
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%l10 = load volatile i32 *%ptr
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%l11 = load volatile i32 *%ptr
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%l12 = load volatile i32 *%ptr
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%l13 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add3 = add i32 %l3, %add1
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%add4 = add i32 %l4, %add3
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%add5 = add i32 %l5, %add4
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%add6 = add i32 %l6, %add5
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%add7 = add i32 %l7, %add6
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%add8 = add i32 %l8, %add7
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%add9 = add i32 %l9, %add8
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%add10 = add i32 %l10, %add9
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%add11 = add i32 %l11, %add10
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%add12 = add i32 %l12, %add11
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%add13 = add i32 %l13, %add12
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%add14 = add i32 %l14, %add13
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add3, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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store volatile i32 %add5, i32 *%ptr
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store volatile i32 %add6, i32 *%ptr
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store volatile i32 %add7, i32 *%ptr
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store volatile i32 %add8, i32 *%ptr
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store volatile i32 %add9, i32 *%ptr
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store volatile i32 %add10, i32 *%ptr
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store volatile i32 %add11, i32 *%ptr
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store volatile i32 %add12, i32 *%ptr
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store volatile i32 %add13, i32 *%ptr
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%final = getelementptr i32 *%ptr, i32 1
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store volatile i32 %add14, i32 *%final
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ret void
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}
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; Like f1, but requires one fewer GPR. We allocate the call-saved GPRs
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; from %r14 down, so that the STMG/LMG sequences aren't any longer than
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; they need to be.
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define void @f2(i32 *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: stmg %r7, %r15, 56(%r15)
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; CHECK-NOT: %r15
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; CHECK: .cfi_offset %r7, -104
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; CHECK: .cfi_offset %r8, -96
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; CHECK: .cfi_offset %r9, -88
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; CHECK: .cfi_offset %r10, -80
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; CHECK: .cfi_offset %r11, -72
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; CHECK: .cfi_offset %r12, -64
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; CHECK: .cfi_offset %r13, -56
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; CHECK: .cfi_offset %r14, -48
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; CHECK: .cfi_offset %r15, -40
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; ...main function body...
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; CHECK-NOT: %r15
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; CHECK-NOT: %r6
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; CHECK: st {{.*}}, 4(%r2)
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; CHECK: lmg %r7, %r15, 56(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l3 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l7 = load volatile i32 *%ptr
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%l8 = load volatile i32 *%ptr
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%l9 = load volatile i32 *%ptr
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%l10 = load volatile i32 *%ptr
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%l11 = load volatile i32 *%ptr
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%l12 = load volatile i32 *%ptr
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%l13 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add3 = add i32 %l3, %add1
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%add4 = add i32 %l4, %add3
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%add5 = add i32 %l5, %add4
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%add7 = add i32 %l7, %add5
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%add8 = add i32 %l8, %add7
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%add9 = add i32 %l9, %add8
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%add10 = add i32 %l10, %add9
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%add11 = add i32 %l11, %add10
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%add12 = add i32 %l12, %add11
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%add13 = add i32 %l13, %add12
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%add14 = add i32 %l14, %add13
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add3, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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store volatile i32 %add5, i32 *%ptr
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store volatile i32 %add7, i32 *%ptr
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store volatile i32 %add8, i32 *%ptr
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store volatile i32 %add9, i32 *%ptr
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store volatile i32 %add10, i32 *%ptr
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store volatile i32 %add11, i32 *%ptr
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store volatile i32 %add12, i32 *%ptr
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store volatile i32 %add13, i32 *%ptr
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%final = getelementptr i32 *%ptr, i32 1
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store volatile i32 %add14, i32 *%final
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ret void
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}
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; Like f1, but only needs one call-saved GPR, which ought to be %r14.
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define void @f3(i32 *%ptr) {
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; CHECK-LABEL: f3:
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; CHECK: stmg %r14, %r15, 112(%r15)
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; CHECK-NOT: %r15
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; CHECK: .cfi_offset %r14, -48
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; CHECK: .cfi_offset %r15, -40
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; ...main function body...
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; CHECK-NOT: %r15
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; CHECK-NOT: %r6
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; CHECK-NOT: %r7
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; CHECK-NOT: %r8
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; CHECK-NOT: %r9
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; CHECK-NOT: %r10
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; CHECK-NOT: %r11
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; CHECK-NOT: %r12
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; CHECK-NOT: %r13
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; CHECK: st {{.*}}, 4(%r2)
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; CHECK: lmg %r14, %r15, 112(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l3 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add3 = add i32 %l3, %add1
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%add4 = add i32 %l4, %add3
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%add5 = add i32 %l5, %add4
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%add14 = add i32 %l14, %add5
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add3, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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store volatile i32 %add5, i32 *%ptr
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%final = getelementptr i32 *%ptr, i32 1
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store volatile i32 %add14, i32 *%final
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ret void
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}
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; This function should use all call-clobbered GPRs but no call-saved ones.
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; It shouldn't need to touch the stack at all.
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define void @f4(i32 *%ptr) {
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; CHECK-LABEL: f4:
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; CHECK-NOT: %r15
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; CHECK-NOT: %r6
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; CHECK-NOT: %r7
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; CHECK-NOT: %r8
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; CHECK-NOT: %r9
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; CHECK-NOT: %r10
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; CHECK-NOT: %r11
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; CHECK-NOT: %r12
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; CHECK-NOT: %r13
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l3 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add3 = add i32 %l3, %add1
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%add4 = add i32 %l4, %add3
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%add5 = add i32 %l5, %add4
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add3, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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%final = getelementptr i32 *%ptr, i32 1
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store volatile i32 %add5, i32 *%final
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ret void
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}
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