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https://github.com/RPCS3/llvm-mirror.git
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815197bb06
Summary: SROA can fail in rewriting alloca but still rewrite a phi resulting in dead instruction elimination. The Changed flag was not being set correctly, resulting in downstream passes using stale analyses. The included test case will assert during the second BDCE pass as a result. Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39921 llvm-svn: 318677
98 lines
2.9 KiB
LLVM
98 lines
2.9 KiB
LLVM
; SROA fails to rewrite allocs but does rewrite some phis and delete
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; dead instructions. Ensure that this invalidates analyses required
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; for other passes.
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; RUN: opt < %s -passes=bdce,sroa,bdce -o %t -debug-pass-manager 2>&1 | FileCheck %s
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; CHECK: Running pass: BDCEPass on H
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; CHECK: Running analysis: DemandedBitsAnalysis on H
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; CHECK: Running pass: SROA on H
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; CHECK: Invalidating all non-preserved analyses for: H
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; CHECK: Invalidating analysis: DemandedBitsAnalysis on H
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; CHECK: Running pass: BDCEPass on H
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; CHECK: Running analysis: DemandedBitsAnalysis on H
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; CHECK: Finished llvm::Function pass manager run.
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-grtev4-linux-gnu"
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%class.b = type { i64 }
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declare void @D(%class.b* sret, %class.b* dereferenceable(32)) local_unnamed_addr
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; Function Attrs: nounwind
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define hidden fastcc void @H(%class.b* noalias nocapture readnone, [2 x i64]) unnamed_addr {
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%3 = alloca %class.b, align 8
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%.sroa.0 = alloca i64, align 8
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store i64 0, i64* %.sroa.0, align 8
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%4 = extractvalue [2 x i64] %1, 1
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switch i64 %4, label %6 [
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i64 4, label %foo
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i64 5, label %5
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]
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; <label>:5:
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%.sroa.0.0..sroa_cast3 = bitcast i64* %.sroa.0 to i8**
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br label %12
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; <label>:6:
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%7 = icmp ugt i64 %4, 5
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%.sroa.0.0..sroa_cast5 = bitcast i64* %.sroa.0 to i8**
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br i1 %7, label %8, label %12
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; <label>:8:
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%9 = load i8, i8* inttoptr (i64 4 to i8*), align 4
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%10 = icmp eq i8 %9, 47
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%11 = select i1 %10, i64 5, i64 4
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br label %12
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; <label>:12:
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%13 = phi i8** [ %.sroa.0.0..sroa_cast3, %5 ], [ %.sroa.0.0..sroa_cast5, %8 ], [ %.sroa.0.0..sroa_cast5, %6 ]
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%14 = phi i64 [ 4, %5 ], [ %11, %8 ], [ 4, %6 ]
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%15 = icmp ne i64 %4, 0
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%16 = icmp ugt i64 %4, %14
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%17 = and i1 %15, %16
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br i1 %17, label %18, label %a.exit
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; <label>:18:
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%19 = tail call i8* @memchr(i8* undef, i32 signext undef, i64 undef)
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%20 = icmp eq i8* %19, null
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%21 = sext i1 %20 to i64
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br label %a.exit
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a.exit:
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%22 = phi i64 [ -1, %12 ], [ %21, %18 ]
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%23 = load i8*, i8** %13, align 8
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%24 = sub nsw i64 %22, %14
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%25 = bitcast %class.b* %3 to i8*
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call void @llvm.lifetime.start.p0i8(i64 32, i8* nonnull %25)
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%26 = icmp ult i64 %24, 2
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br i1 %26, label %G.exit, label %27
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; <label>:27:
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%28 = getelementptr inbounds i8, i8* %23, i64 undef
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%29 = icmp eq i8* %28, null
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br i1 %29, label %30, label %31
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; <label>:30:
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unreachable
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; <label>:31:
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call void @D(%class.b* nonnull sret %3, %class.b* nonnull dereferenceable(32) undef)
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br label %G.exit
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G.exit:
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call void @llvm.lifetime.end.p0i8(i64 32, i8* nonnull %25)
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br label %foo
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foo:
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ret void
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}
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; Function Attrs: nounwind readonly
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declare i8* @memchr(i8*, i32 signext, i64) local_unnamed_addr
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; Function Attrs: argmemonly nounwind
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
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; Function Attrs: argmemonly nounwind
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
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