Jakob Stoklund Olesen 6a4a23b14f Add a MachineOperand::isTied() flag. ... While in SSA form, a MachineInstr can have pairs of tied defs and uses. The tied operands are used to represent read-modify-write operands that must be assigned the same physical register. Previously, tied operand pairs were computed from fixed MCInstrDesc fields, or by using black magic on inline assembly instructions. The isTied flag makes it possible to add tied operands to any instruction while getting rid of (some of) the inlineasm magic. Tied operands on normal instructions are needed to represent predicated individual instructions in SSA form. An extra <tied,imp-use> operand is required to represent the output value when the instruction predicate is false. Adding a predicate to: %vreg0<def> = ADD %vreg1, %vreg2 Will look like: %vreg0<tied,def> = ADD %vreg1, %vreg2, pred:3, %vreg7<tied,imp-use> The virtual register %vreg7 is the value given to %vreg0 when the predicate is false. It will be assigned the same physreg as %vreg0. This commit adds the isTied flag and sets it based on MCInstrDesc when building an instruction. The flag is not used for anything yet. llvm-svn: 162774		2012-08-28 18:34:41 +00:00
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Analysis	Remove the the block_node_iterator of Region, replace it by the block_iterator.	2012-08-27 13:49:24 +00:00
Archive	Remove references to compression in llvm-ar. It has been a long time since we	2012-08-10 01:57:52 +00:00
AsmParser	Change the linker_private_weak_def_auto' linkage to linkonce_odr_auto_hide' to	2012-08-17 18:33:14 +00:00
Bitcode	Change the linker_private_weak_def_auto' linkage to linkonce_odr_auto_hide' to	2012-08-17 18:33:14 +00:00
CodeGen	Add a MachineOperand::isTied() flag.	2012-08-28 18:34:41 +00:00
DebugInfo	Fix compile error when building with C++11 - clang thinks that PRIx64 is a user-defined suffix or something	2012-08-27 22:53:35 +00:00
ExecutionEngine	Fix comment for function RuntimeDyldImpl.resolveRelocation()	2012-08-27 15:34:01 +00:00
Linker	Move the "findUsedStructTypes" functionality outside of the Module class.	2012-08-03 00:30:35 +00:00
MC	Fix comment.	2012-08-27 16:04:24 +00:00
Object	Reverting r 160419.	2012-07-19 21:43:55 +00:00
Support	Add the Freescale vendor to Triple.	2012-08-28 02:10:30 +00:00
TableGen	Tristate mayLoad, mayStore, and hasSideEffects.	2012-08-23 19:34:46 +00:00
Target	Add PPC Freescale e500mc and e5500 subtargets.	2012-08-28 16:12:39 +00:00
Transforms	InstCombine: Defensively avoid undefined shifts by limiting the amount to the bit width.	2012-08-28 13:59:23 +00:00
VMCore	Make atomic load and store of pointers work. Tighten verification of atomic operations	2012-08-17 23:24:29 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile