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llvm-mirror/test/CodeGen/Mips/Fast-ISel/double-arg.ll
Vasileios Kalintiris 083354fdfb [mips][FastISel] Instantiate the MipsFastISel class only for targets that support FastISel.
Summary:
Instead of instantiating the MipsFastISel class and checking if the
target is supported in the overriden methods, we should perform that
check before creating the class. This allows us to enable FastISel *only*
for targets that truly support it, ie. MIPS32 to MIPS32R5.

Reviewers: sdardis

Subscribers: ehostunreach, llvm-commits

Differential Revision: https://reviews.llvm.org/D24824

llvm-svn: 284475
2016-10-18 13:05:42 +00:00

15 lines
453 B
LLVM

; RUN: not llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 \
; RUN: -O0 -relocation-model=pic -fast-isel-abort=3 < %s
; Check that FastISel aborts when we have 64bit FPU registers. FastISel currently
; supports AFGR64 only, which uses paired 32 bit registers.
define zeroext i1 @f(double %value) {
entry:
; CHECK-LABEL: f:
; CHECK: sdc1
%value.addr = alloca double, align 8
store double %value, double* %value.addr, align 8
ret i1 false
}