| .. |
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AsmParser
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[AMDGPU][MC] Corrected handling of relocatable expressions
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2019-09-23 15:41:51 +00:00 |
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Disassembler
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[AMDGPU] gfx908 mAI instructions, MC part
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2019-07-09 21:43:09 +00:00 |
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MCTargetDesc
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[MC] Minor cleanup to MCFixup::Kind handling. NFC.
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2019-08-23 01:00:55 +00:00 |
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TargetInfo
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Utils
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Partially revert D61491 "AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0"
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2019-09-02 14:40:57 +00:00 |
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AMDGPU.h
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[AMDGPU] Printf runtime binding pass
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2019-08-12 17:12:29 +00:00 |
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AMDGPU.td
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[AMDGPU] w/a for gfx908 mfma SrcC literal HW bug
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2019-08-23 22:09:58 +00:00 |
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AMDGPUAliasAnalysis.cpp
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AMDGPU: Improve alias analysis for GDS
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2019-07-17 11:22:19 +00:00 |
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AMDGPUAliasAnalysis.h
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAnnotateKernelFeatures.cpp
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Use llvm::StringLiteral instead of StringRef in few places
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2019-09-20 14:31:42 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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AMDGPUArgumentUsageInfo.cpp
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[AMDGPU] Packed thread ids in function call ABI
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2019-06-28 01:52:13 +00:00 |
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AMDGPUArgumentUsageInfo.h
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AMDGPU: Fix Register copypaste error
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2019-09-05 23:07:10 +00:00 |
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AMDGPUAsmPrinter.cpp
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[Alignment] Introduce llvm::Align to MCSection
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2019-09-13 09:29:59 +00:00 |
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AMDGPUAsmPrinter.h
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[AsmPrinter] Remove const qualifier from EmitBasicBlockStart.
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2019-08-20 05:13:57 +00:00 |
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AMDGPUAtomicOptimizer.cpp
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[AMDGPU] gfx10 atomic optimizer changes.
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2019-08-23 10:07:43 +00:00 |
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AMDGPUCallingConv.td
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[AMDGPU] Adjust number of SGPRs available in Calling Convention
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2019-08-28 15:00:45 +00:00 |
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AMDGPUCallLowering.cpp
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AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC
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2019-09-09 23:06:13 +00:00 |
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AMDGPUCallLowering.h
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AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC
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2019-09-09 23:06:13 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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AMDGPU: Preserve value name when inserting mul24 intrinsic
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2019-08-24 22:17:10 +00:00 |
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AMDGPUFeatures.td
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AMDGPUFixFunctionBitcasts.cpp
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUGenRegisterBankInfo.def
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[NFC] Fixed -Wdocumentation warning
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2019-08-31 18:44:57 +00:00 |
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AMDGPUGISel.td
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AMDGPU/GlobalISel: Select cvt pk intrinsics
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2019-09-10 17:17:05 +00:00 |
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AMDGPUHSAMetadataStreamer.cpp
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[AMDGPU] Added a new metadata for multi grid sync implicit argument
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2019-07-05 16:05:17 +00:00 |
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AMDGPUHSAMetadataStreamer.h
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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AMDGPUInline.cpp
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[AMDGPU] Tune inlining parameters for AMDGPU target
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2019-07-17 16:51:29 +00:00 |
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AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
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AMDGPU/GlobalISel: Select cvt pk intrinsics
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2019-09-10 17:17:05 +00:00 |
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AMDGPUInstructions.td
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AMDGPU/GlobalISel: Select local atomic cmpxchg
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2019-08-01 03:41:41 +00:00 |
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AMDGPUInstructionSelector.cpp
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[AMDGPU] Use std::make_tuple to make some toolchains happy again
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2019-09-20 12:13:12 +00:00 |
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AMDGPUInstructionSelector.h
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
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2019-09-19 16:26:14 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |
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AMDGPUISelLowering.cpp
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[TargetLowering] Make allowsMemoryAccess methode virtual.
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2019-09-26 00:16:01 +00:00 |
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AMDGPUISelLowering.h
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AMDGPU/GlobalISel: Implement LDS G_GLOBAL_VALUE
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2019-09-09 17:13:44 +00:00 |
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AMDGPULegalizerInfo.cpp
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
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2019-09-19 16:26:14 +00:00 |
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AMDGPULegalizerInfo.h
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
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2019-09-19 16:26:14 +00:00 |
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AMDGPULibCalls.cpp
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Fix missing use of defined() in include guard
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2019-07-12 20:12:15 +00:00 |
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AMDGPULibFunc.cpp
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[AMDGPU] Downgrade from StringLiteral to const char* in an attempt to make GCC 5 happy
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2019-08-25 12:47:31 +00:00 |
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AMDGPULibFunc.h
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AMDGPULowerIntrinsics.cpp
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AMDGPULowerKernelArguments.cpp
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AMDGPU: Consolidate some getGeneration checks
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2019-06-19 23:54:58 +00:00 |
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AMDGPULowerKernelAttributes.cpp
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AMDGPUMachineCFGStructurizer.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass
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2019-07-05 20:26:13 +00:00 |
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AMDGPUMachineFunction.h
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AMDGPUMachineModuleInfo.cpp
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AMDGPUMachineModuleInfo.h
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AMDGPUMacroFusion.cpp
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AMDGPUMacroFusion.h
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AMDGPUMCInstLower.cpp
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AMDGPU: Prepare for explicit absolute relocations in code generation
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2019-06-16 17:43:37 +00:00 |
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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Fix parameter name comments using clang-tidy. NFC.
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2019-07-16 04:46:31 +00:00 |
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AMDGPUPerfHintAnalysis.cpp
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AMDGPU: Fix assert in clang test
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2019-07-05 21:09:53 +00:00 |
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AMDGPUPerfHintAnalysis.h
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AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass
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2019-07-05 20:26:13 +00:00 |
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AMDGPUPrintfRuntimeBinding.cpp
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AMDGPUPrintfRuntimeBinding - silence static analyzer null dereference warnings. NFCI.
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2019-09-22 13:01:49 +00:00 |
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AMDGPUPromoteAlloca.cpp
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AMDGPU: Fix iterator crash in AMDGPUPromoteAlloca
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2019-06-18 12:23:44 +00:00 |
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AMDGPUPropagateAttributes.cpp
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AMDGPU: Move DEBUG_TYPE definition below includes
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2019-07-08 18:48:39 +00:00 |
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AMDGPUPTNote.h
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AMDGPURegisterBankInfo.cpp
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[NFC] Add { } to silence compiler warning [-Wmissing-braces].
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2019-09-25 04:40:07 +00:00 |
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AMDGPURegisterBankInfo.h
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
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2019-09-19 16:26:14 +00:00 |
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AMDGPURegisterBanks.td
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GlobalISel/TableGen: Handle setcc patterns
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2019-08-29 01:13:41 +00:00 |
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AMDGPURegisterInfo.cpp
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[AMDGPU] gfx908 mAI instructions, MC part
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2019-07-09 21:43:09 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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[AMDGPU] gfx908 register file changes
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2019-07-09 19:41:51 +00:00 |
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AMDGPURewriteOutArguments.cpp
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AMDGPUSearchableTables.td
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AMDGPU: add missing llvm.amdgcn.{raw,struct}.buffer.atomic.{inc,dec}
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2019-08-05 09:36:06 +00:00 |
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AMDGPUSubtarget.cpp
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[AMDGPU] fixed underflow in getOccupancyWithNumVGPRs
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2019-09-19 20:09:04 +00:00 |
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AMDGPUSubtarget.h
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
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2019-09-19 16:26:14 +00:00 |
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AMDGPUTargetMachine.cpp
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AMDGPU: Run AMDGPUCodeGenPrepare after scalar opts
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2019-08-27 00:08:31 +00:00 |
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AMDGPUTargetMachine.h
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AMDGPUTargetObjectFile.cpp
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AMDGPUTargetObjectFile.h
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AMDGPUTargetTransformInfo.cpp
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AMDGPU: Add intrinsics for address space identification
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2019-09-05 02:20:39 +00:00 |
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AMDGPUTargetTransformInfo.h
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InferAddressSpaces: Move target intrinsic handling to TTI
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2019-08-14 18:13:00 +00:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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Update phis in AMDGPUUnifyDivergentExitNodes
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2019-06-25 18:55:16 +00:00 |
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AMDGPUUnifyMetadata.cpp
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AMDILCFGStructurizer.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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AMDKernelCodeT.h
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[AMDGPU] gfx1010 wave32 metadata
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2019-06-17 16:48:56 +00:00 |
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BUFInstructions.td
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
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2019-09-19 16:26:14 +00:00 |
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CaymanInstructions.td
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CMakeLists.txt
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[AMDGPU] Printf runtime binding pass
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2019-08-12 17:12:29 +00:00 |
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DSInstructions.td
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
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2019-09-19 16:26:14 +00:00 |
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EvergreenInstructions.td
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AMDGPU: Start redefining atomic PatFrags
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2019-08-01 03:25:52 +00:00 |
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FLATInstructions.td
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AMDGPU/GlobalISel: Avoid repeating 32-bit type lists
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2019-09-06 00:36:10 +00:00 |
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GCNDPPCombine.cpp
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[AMDGPU] Fix DPP combiner check for exec modification
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2019-07-12 15:59:40 +00:00 |
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GCNHazardRecognizer.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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GCNHazardRecognizer.h
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[AMDGPU] gfx908 hazard recognizer
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2019-07-11 21:30:34 +00:00 |
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GCNILPSched.cpp
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GCNIterativeScheduler.cpp
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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GCNIterativeScheduler.h
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GCNMinRegStrategy.cpp
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GCNNSAReassign.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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GCNProcessors.td
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[AMDGPU] gfx908 target
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2019-07-09 18:10:06 +00:00 |
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GCNRegBankReassign.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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GCNRegPressure.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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GCNRegPressure.h
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |
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GCNSchedStrategy.cpp
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Add tracing in pickNodeFromQueue.
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2019-09-25 08:45:41 +00:00 |
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GCNSchedStrategy.h
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AMDGPU: Avoid constructing new std::vector in initCandidate
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2019-09-05 22:44:06 +00:00 |
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LLVMBuild.txt
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MIMGInstructions.td
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[AMDGPU] Use PredicateControl in MIMGBaseOpcode. NFC.
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2019-08-12 22:32:21 +00:00 |
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R600.td
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R600AsmPrinter.cpp
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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R600AsmPrinter.h
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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R600FrameLowering.cpp
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R600FrameLowering.h
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R600InstrFormats.td
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R600InstrInfo.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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R600InstrInfo.h
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R600Instructions.td
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AMDGPU: Redefine load PatFrags
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2019-07-16 17:38:50 +00:00 |
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R600ISelLowering.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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R600MachineScheduler.h
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R600OpenCLImageTypeLoweringPass.cpp
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R600OptimizeVectorRegisters.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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R600Packetizer.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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R600Processors.td
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R600RegisterInfo.cpp
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |
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R600RegisterInfo.h
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CodeGen: Introduce a class for registers
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2019-06-24 15:50:29 +00:00 |
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R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAddIMGInit.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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SIAnnotateControlFlow.cpp
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[AMDGPU] gfx1010 wave32 icmp/fcmp intrinsic changes for wave32
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2019-06-13 23:47:36 +00:00 |
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SIDefines.h
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[AMDGPU] Added MI bit IsDOT
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2019-09-17 17:56:13 +00:00 |
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SIFixSGPRCopies.cpp
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AMDGPU: Fix bug in r371671 on some builds.
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2019-09-12 19:12:21 +00:00 |
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SIFixupVectorISel.cpp
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |
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SIFixVGPRCopies.cpp
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SIFoldOperands.cpp
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[AMDGPU] gfx10 v_fmac_f16 operand folding
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2019-09-25 18:40:20 +00:00 |
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SIFormMemoryClauses.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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SIFrameLowering.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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SIFrameLowering.h
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[AMDGPU] Add the adjusted FP as a livein register.
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2019-07-16 15:57:12 +00:00 |
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SIInsertSkips.cpp
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[AMDGPU] gfx10 conditional registers handling
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2019-06-16 17:13:09 +00:00 |
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SIInsertWaitcnts.cpp
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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SIInstrFormats.td
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[AMDGPU] Added MI bit IsDOT
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2019-09-17 17:56:13 +00:00 |
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SIInstrInfo.cpp
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Remove the AliasAnalysis argument in function areMemAccessesTriviallyDisjoint
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2019-09-26 22:53:44 +00:00 |
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SIInstrInfo.h
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Remove the AliasAnalysis argument in function areMemAccessesTriviallyDisjoint
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2019-09-26 22:53:44 +00:00 |
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SIInstrInfo.td
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[AMDGPU] Added MI bit IsDOT
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2019-09-17 17:56:13 +00:00 |
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SIInstructions.td
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
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2019-09-19 16:26:14 +00:00 |
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SIISelLowering.cpp
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[TargetLowering] Make allowsMemoryAccess methode virtual.
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2019-09-26 00:16:01 +00:00 |
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SIISelLowering.h
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AMDGPU/GlobalISel: First pass at attempting to legalize load/stores
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2019-09-10 16:20:14 +00:00 |
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SILoadStoreOptimizer.cpp
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AMDGPU/SILoadStoreOptimizer: Add const to more functions
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2019-09-19 04:39:45 +00:00 |
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SILowerControlFlow.cpp
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[AMDGPU]: PHI Elimination hooks added for custom COPY insertion. Fixed
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2019-09-17 09:08:58 +00:00 |
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SILowerI1Copies.cpp
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[Dominators][AMDGPU] Don't use virtual exit node in findNearestCommonDominator. Cleanup MachinePostDominators.
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2019-09-25 14:04:36 +00:00 |
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SILowerSGPRSpills.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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SIMachineFunctionInfo.cpp
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AMDGPU: Add amdgpu-32bit-address-high-bits to MIR serialization
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2019-08-27 18:18:38 +00:00 |
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SIMachineFunctionInfo.h
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AMDGPU: Add amdgpu-32bit-address-high-bits to MIR serialization
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2019-08-27 18:18:38 +00:00 |
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SIMachineScheduler.cpp
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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SIMachineScheduler.h
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SIMemoryLegalizer.cpp
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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SIModeRegister.cpp
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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SIOptimizeExecMasking.cpp
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Revert "AMDGPU: Fix iterator error when lowering SI_END_CF"
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2019-08-20 17:45:25 +00:00 |
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SIOptimizeExecMaskingPreRA.cpp
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Revert "AMDGPU: Fix iterator error when lowering SI_END_CF"
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2019-08-20 17:45:25 +00:00 |
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SIPeepholeSDWA.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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SIPreAllocateWWMRegs.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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SIProgramInfo.h
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[AMDGPU] Fix high occupancy calculation and print it
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2019-07-31 01:07:10 +00:00 |
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SIRegisterInfo.cpp
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AMDGPU: Inline constant when materalizing FI with add on gfx9
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2019-09-12 23:46:46 +00:00 |
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SIRegisterInfo.h
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[AMDGPU] w/a for gfx908 mfma SrcC literal HW bug
|
2019-08-23 22:09:58 +00:00 |
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SIRegisterInfo.td
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AMDGPU: Make VReg_1 size be 1
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2019-09-09 18:43:29 +00:00 |
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SISchedule.td
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[AMDGPU] gfx908 scheduling
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2019-07-11 21:25:00 +00:00 |
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SIShrinkInstructions.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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SIWholeQuadMode.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
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SMInstructions.td
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AMDGPU/GlobalISel: Select SMRD loads for more types
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2019-09-16 00:54:07 +00:00 |
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SOPInstructions.td
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AMDGPU/GlobalISel: Allow selection of scalar min/max
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2019-09-21 02:37:33 +00:00 |
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VIInstrFormats.td
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VIInstructions.td
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VOP1Instructions.td
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
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2019-09-19 16:26:14 +00:00 |
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VOP2Instructions.td
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[AMDGPU] Allow FP inline constant in v_madak_f16 and v_fmaak_f16
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2019-09-18 09:32:06 +00:00 |
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VOP3Instructions.td
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Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
|
2019-09-19 16:26:14 +00:00 |
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VOP3PInstructions.td
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[AMDGPU] Added MI bit IsDOT
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2019-09-17 17:56:13 +00:00 |
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VOPCInstructions.td
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AMDGPU/GlobalISel: Select llvm.amdgcn.class
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2019-09-09 18:29:45 +00:00 |
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VOPInstructions.td
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[AMDGPU] copy OtherPredicates from pseudo to VOP3_Real
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2019-09-26 21:06:17 +00:00 |
