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b434098ac8
SUMMARY: 1. in the patch , remove setting storageclass in function .getXCOFFSection and construct function of class MCSectionXCOFF there are XCOFF::StorageMappingClass MappingClass; XCOFF::SymbolType Type; XCOFF::StorageClass StorageClass; in the MCSectionXCOFF class, these attribute only used in the XCOFFObjectWriter, (asm path do not need the StorageClass) we need get the value of StorageClass, Type,MappingClass before we invoke the getXCOFFSection every time. actually , we can get the StorageClass of the MCSectionXCOFF from it's delegated symbol. 2. we also change the oprand of branch instruction from symbol name to qualify symbol name. for example change bl .foo extern .foo to bl .foo[PR] extern .foo[PR] 3. and if there is reference indirect call a function bar. we also add extern .bar[PR] Reviewers: Jason liu, Xiangling Liao Differential Revision: https://reviews.llvm.org/D84765
154 lines
5.3 KiB
LLVM
154 lines
5.3 KiB
LLVM
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -mcpu=pwr4 \
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; RUN: -mattr=-altivec -verify-machineinstrs < %s | \
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; RUN: FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
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; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | \
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; RUN: FileCheck --check-prefix=ASM %s
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%struct.S5 = type { [5 x i8] }
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define zeroext i8 @test_byval_5Byte(%struct.S5* byval(%struct.S5) align 1 %s) {
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entry:
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%arrayidx = getelementptr inbounds %struct.S5, %struct.S5* %s, i32 0, i32 0, i32 4
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%0 = load i8, i8* %arrayidx, align 1
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ret i8 %0
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}
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; CHECK-LABEL: name: test_byval_5Byte
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; CHECK: fixedStack:
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; CHECK-NEXT: - { id: 0, type: default, offset: 48, size: 8, alignment: 16,
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; CHECK: bb.0.entry:
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; CHECK-NEXT: liveins: $x3
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; CHECK: STD killed renamable $x3, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0, align 16)
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; CHECK-NEXT: renamable $x3 = LBZ8 4, %fixed-stack.0 :: (dereferenceable load 1
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; CHECKASM-LABEL: .test_byval_5Byte:
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; ASM: std 3, 48(1)
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; ASM-NEXT: lbz 3, 52(1)
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; ASM-NEXT: blr
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%struct.S6 = type { [6 x i8] }
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define zeroext i8 @test_byval_6Byte(%struct.S6* byval(%struct.S6) align 1 %s) {
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entry:
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%arrayidx = getelementptr inbounds %struct.S6, %struct.S6* %s, i32 0, i32 0, i32 5
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%0 = load i8, i8* %arrayidx, align 1
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ret i8 %0
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}
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; CHECK-LABEL: name: test_byval_6Byte
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; CHECK: fixedStack:
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; CHECK-NEXT: - { id: 0, type: default, offset: 48, size: 8, alignment: 16,
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; CHECK: bb.0.entry:
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; CHECK-NEXT: liveins: $x3
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; CHECK: STD killed renamable $x3, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0, align 16)
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; CHECK-NEXT: renamable $x3 = LBZ8 5, %fixed-stack.0 :: (dereferenceable load 1
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; CHECKASM-LABEL: .test_byval_6Byte:
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; ASM: std 3, 48(1)
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; ASM-NEXT: lbz 3, 53(1)
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; ASM-NEXT: blr
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%struct.S7 = type { [7 x i8] }
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define zeroext i8 @test_byval_7Byte(%struct.S7* byval(%struct.S7) align 1 %s) {
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entry:
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%arrayidx = getelementptr inbounds %struct.S7, %struct.S7* %s, i32 0, i32 0, i32 6
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%0 = load i8, i8* %arrayidx, align 1
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ret i8 %0
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}
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; CHECK-LABEL: name: test_byval_7Byte
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; CHECK: fixedStack:
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; CHECK-NEXT: - { id: 0, type: default, offset: 48, size: 8, alignment: 16,
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; CHECK: bb.0.entry:
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; CHECK-NEXT: liveins: $x3
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; CHECK: STD killed renamable $x3, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0, align 16)
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; CHECK-NEXT: renamable $x3 = LBZ8 6, %fixed-stack.0 :: (dereferenceable load 1
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; CHECKASM-LABEL: .test_byval_7Byte:
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; ASM: std 3, 48(1)
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; ASM-NEXT: lbz 3, 54(1)
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; ASM-NEXT: blr
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%struct.S8 = type { [8 x i8] }
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define zeroext i8 @test_byval_8Byte(%struct.S8* byval(%struct.S8) align 1 %s) {
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entry:
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%arrayidx = getelementptr inbounds %struct.S8, %struct.S8* %s, i32 0, i32 0, i32 7
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%0 = load i8, i8* %arrayidx, align 1
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ret i8 %0
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}
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; CHECK-LABEL: name: test_byval_8Byte
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; CHECK: fixedStack:
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; CHECK-NEXT: - { id: 0, type: default, offset: 48, size: 8, alignment: 16,
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; CHECK: bb.0.entry:
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; CHECK-NEXT: liveins: $x3
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; CHECK: renamable $x[[SCRATCH:[0-9]+]] = COPY $x3
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; CHECK-DAG: renamable $x3 = RLDICL $x3, 0, 56
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; CHECK-DAG: STD killed renamable $x[[SCRATCH]], 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0, align 16)
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; CHECKASM-LABEL: .test_byval_8Byte:
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; ASM: mr [[SCRATCH:[0-9]+]], 3
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; ASM-DAG: clrldi 3, 3, 56
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; ASM-DAG: std [[SCRATCH]], 48(1)
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; ASM-NEXT: blr
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%struct.S64 = type { [64 x i8] }
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@gS64 = external global %struct.S64, align 1
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define void @call_test_byval_64Byte() {
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entry:
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call void @test_byval_64Byte(%struct.S64* byval(%struct.S64) align 1 @gS64)
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ret void
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}
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declare void @test_byval_64Byte(%struct.S64* byval(%struct.S64) align 1)
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; CHECK-LABEL: name: call_test_byval_64Byte{{.*}}
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; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
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; CHECK: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
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; CHECK-NEXT: renamable $x[[REGADDR:[0-9]+]] = LDtoc @gS64, $x2 :: (load 8 from got)
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; CHECK-DAG: renamable $x3 = LD 0, killed renamable $x[[REGADDR]] :: (load 8)
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; CHECK-DAG: renamable $x4 = LD 8, renamable $x[[REGADDR]] :: (load 8)
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; CHECK-DAG: renamable $x5 = LD 16, renamable $x[[REGADDR]] :: (load 8)
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; CHECK-DAG: renamable $x6 = LD 24, renamable $x[[REGADDR]] :: (load 8)
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; CHECK-DAG: renamable $x7 = LD 32, renamable $x[[REGADDR]] :: (load 8)
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; CHECK-DAG: renamable $x8 = LD 40, renamable $x[[REGADDR]] :: (load 8)
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; CHECK-DAG: renamable $x9 = LD 48, renamable $x[[REGADDR]] :: (load 8)
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; CHECK-DAG: renamable $x10 = LD 56, renamable $x[[REGADDR]] :: (load 8)
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; CHECK-NEXT: BL8_NOP <mcsymbol .test_byval_64Byte[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1
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; CHECK-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
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; CHECKASM-LABEL: .test_byval_64Byte:
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; ASM: stdu 1, -112(1)
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; ASM-NEXT: ld [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
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; ASM-DAG: ld 3, 0([[REG]])
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; ASM-DAG: ld 4, 8([[REG]])
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; ASM-DAG: ld 5, 16([[REG]])
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; ASM-DAG: ld 6, 24([[REG]])
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; ASM-DAG: ld 7, 32([[REG]])
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; ASM-DAG: ld 8, 40([[REG]])
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; ASM-DAG: ld 9, 48([[REG]])
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; ASM-DAG: ld 10, 56([[REG]])
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; ASM-NEXT: bl .test_byval_64Byte
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; ASM-NEXT: nop
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