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768 lines
28 KiB
C++
768 lines
28 KiB
C++
//===- StrongPhiElimination.cpp - Eliminate PHI nodes by inserting copies -===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass eliminates machine instruction PHI nodes by inserting copy
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// instructions, using an intelligent copy-folding technique based on
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// dominator information. This is technique is derived from:
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//
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// Budimlic, et al. Fast copy coalescing and live-range identification.
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// In Proceedings of the ACM SIGPLAN 2002 Conference on Programming Language
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// Design and Implementation (Berlin, Germany, June 17 - 19, 2002).
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// PLDI '02. ACM, New York, NY, 25-32.
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// DOI= http://doi.acm.org/10.1145/512529.512534
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "strongphielim"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/ADT/DepthFirstIterator.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/Compiler.h"
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using namespace llvm;
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namespace {
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struct VISIBILITY_HIDDEN StrongPHIElimination : public MachineFunctionPass {
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static char ID; // Pass identification, replacement for typeid
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StrongPHIElimination() : MachineFunctionPass((intptr_t)&ID) {}
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// Waiting stores, for each MBB, the set of copies that need to
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// be inserted into that MBB
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DenseMap<MachineBasicBlock*,
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std::map<unsigned, unsigned> > Waiting;
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// Stacks holds the renaming stack for each register
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std::map<unsigned, std::vector<unsigned> > Stacks;
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// Registers in UsedByAnother are PHI nodes that are themselves
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// used as operands to another another PHI node
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std::set<unsigned> UsedByAnother;
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// RenameSets are the sets of operands to a PHI (the defining instruction
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// of the key) that can be renamed without copies
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std::map<unsigned, std::set<unsigned> > RenameSets;
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// Store the DFS-in number of each block
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DenseMap<MachineBasicBlock*, unsigned> preorder;
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// Store the DFS-out number of each block
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DenseMap<MachineBasicBlock*, unsigned> maxpreorder;
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bool runOnMachineFunction(MachineFunction &Fn);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<MachineDominatorTree>();
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AU.addRequired<LiveVariables>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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virtual void releaseMemory() {
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preorder.clear();
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maxpreorder.clear();
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Waiting.clear();
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Stacks.clear();
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UsedByAnother.clear();
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RenameSets.clear();
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}
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private:
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/// DomForestNode - Represents a node in the "dominator forest". This is
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/// a forest in which the nodes represent registers and the edges
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/// represent a dominance relation in the block defining those registers.
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struct DomForestNode {
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private:
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// Store references to our children
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std::vector<DomForestNode*> children;
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// The register we represent
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unsigned reg;
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// Add another node as our child
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void addChild(DomForestNode* DFN) { children.push_back(DFN); }
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public:
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typedef std::vector<DomForestNode*>::iterator iterator;
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// Create a DomForestNode by providing the register it represents, and
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// the node to be its parent. The virtual root node has register 0
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// and a null parent.
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DomForestNode(unsigned r, DomForestNode* parent) : reg(r) {
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if (parent)
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parent->addChild(this);
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}
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~DomForestNode() {
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for (iterator I = begin(), E = end(); I != E; ++I)
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delete *I;
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}
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/// getReg - Return the regiser that this node represents
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inline unsigned getReg() { return reg; }
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// Provide iterator access to our children
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inline DomForestNode::iterator begin() { return children.begin(); }
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inline DomForestNode::iterator end() { return children.end(); }
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};
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void computeDFS(MachineFunction& MF);
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void processBlock(MachineBasicBlock* MBB);
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std::vector<DomForestNode*> computeDomForest(std::set<unsigned>& instrs,
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MachineRegisterInfo& MRI);
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void processPHIUnion(MachineInstr* Inst,
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std::set<unsigned>& PHIUnion,
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std::vector<StrongPHIElimination::DomForestNode*>& DF,
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std::vector<std::pair<unsigned, unsigned> >& locals);
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void ScheduleCopies(MachineBasicBlock* MBB, std::set<unsigned>& pushed);
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void InsertCopies(MachineBasicBlock* MBB, std::set<MachineBasicBlock*>& v);
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};
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char StrongPHIElimination::ID = 0;
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RegisterPass<StrongPHIElimination> X("strong-phi-node-elimination",
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"Eliminate PHI nodes for register allocation, intelligently");
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}
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const PassInfo *llvm::StrongPHIEliminationID = X.getPassInfo();
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/// computeDFS - Computes the DFS-in and DFS-out numbers of the dominator tree
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/// of the given MachineFunction. These numbers are then used in other parts
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/// of the PHI elimination process.
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void StrongPHIElimination::computeDFS(MachineFunction& MF) {
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SmallPtrSet<MachineDomTreeNode*, 8> frontier;
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SmallPtrSet<MachineDomTreeNode*, 8> visited;
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unsigned time = 0;
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MachineDominatorTree& DT = getAnalysis<MachineDominatorTree>();
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MachineDomTreeNode* node = DT.getRootNode();
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std::vector<MachineDomTreeNode*> worklist;
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worklist.push_back(node);
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while (!worklist.empty()) {
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MachineDomTreeNode* currNode = worklist.back();
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if (!frontier.count(currNode)) {
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frontier.insert(currNode);
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++time;
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preorder.insert(std::make_pair(currNode->getBlock(), time));
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}
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bool inserted = false;
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for (MachineDomTreeNode::iterator I = node->begin(), E = node->end();
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I != E; ++I)
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if (!frontier.count(*I) && !visited.count(*I)) {
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worklist.push_back(*I);
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inserted = true;
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break;
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}
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if (!inserted) {
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frontier.erase(currNode);
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visited.insert(currNode);
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maxpreorder.insert(std::make_pair(currNode->getBlock(), time));
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worklist.pop_back();
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}
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}
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}
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/// PreorderSorter - a helper class that is used to sort registers
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/// according to the preorder number of their defining blocks
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class PreorderSorter {
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private:
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DenseMap<MachineBasicBlock*, unsigned>& preorder;
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MachineRegisterInfo& MRI;
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public:
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PreorderSorter(DenseMap<MachineBasicBlock*, unsigned>& p,
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MachineRegisterInfo& M) : preorder(p), MRI(M) { }
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bool operator()(unsigned A, unsigned B) {
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if (A == B)
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return false;
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MachineBasicBlock* ABlock = MRI.getVRegDef(A)->getParent();
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MachineBasicBlock* BBlock = MRI.getVRegDef(B)->getParent();
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if (preorder[ABlock] < preorder[BBlock])
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return true;
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else if (preorder[ABlock] > preorder[BBlock])
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return false;
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return false;
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}
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};
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/// computeDomForest - compute the subforest of the DomTree corresponding
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/// to the defining blocks of the registers in question
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std::vector<StrongPHIElimination::DomForestNode*>
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StrongPHIElimination::computeDomForest(std::set<unsigned>& regs,
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MachineRegisterInfo& MRI) {
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// Begin by creating a virtual root node, since the actual results
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// may well be a forest. Assume this node has maximum DFS-out number.
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DomForestNode* VirtualRoot = new DomForestNode(0, 0);
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maxpreorder.insert(std::make_pair((MachineBasicBlock*)0, ~0UL));
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// Populate a worklist with the registers
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std::vector<unsigned> worklist;
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worklist.reserve(regs.size());
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for (std::set<unsigned>::iterator I = regs.begin(), E = regs.end();
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I != E; ++I)
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worklist.push_back(*I);
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// Sort the registers by the DFS-in number of their defining block
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PreorderSorter PS(preorder, MRI);
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std::sort(worklist.begin(), worklist.end(), PS);
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// Create a "current parent" stack, and put the virtual root on top of it
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DomForestNode* CurrentParent = VirtualRoot;
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std::vector<DomForestNode*> stack;
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stack.push_back(VirtualRoot);
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// Iterate over all the registers in the previously computed order
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for (std::vector<unsigned>::iterator I = worklist.begin(), E = worklist.end();
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I != E; ++I) {
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unsigned pre = preorder[MRI.getVRegDef(*I)->getParent()];
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MachineBasicBlock* parentBlock = CurrentParent->getReg() ?
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MRI.getVRegDef(CurrentParent->getReg())->getParent() :
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0;
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// If the DFS-in number of the register is greater than the DFS-out number
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// of the current parent, repeatedly pop the parent stack until it isn't.
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while (pre > maxpreorder[parentBlock]) {
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stack.pop_back();
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CurrentParent = stack.back();
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parentBlock = CurrentParent->getReg() ?
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MRI.getVRegDef(CurrentParent->getReg())->getParent() :
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0;
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}
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// Now that we've found the appropriate parent, create a DomForestNode for
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// this register and attach it to the forest
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DomForestNode* child = new DomForestNode(*I, CurrentParent);
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// Push this new node on the "current parent" stack
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stack.push_back(child);
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CurrentParent = child;
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}
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// Return a vector containing the children of the virtual root node
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std::vector<DomForestNode*> ret;
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ret.insert(ret.end(), VirtualRoot->begin(), VirtualRoot->end());
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return ret;
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}
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/// isLiveIn - helper method that determines, from a VarInfo, if a register
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/// is live into a block
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static bool isLiveIn(unsigned r, MachineBasicBlock* MBB,
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MachineRegisterInfo& MRI, LiveVariables& LV) {
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LiveVariables::VarInfo V = LV.getVarInfo(r);
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if (V.AliveBlocks.test(MBB->getNumber()))
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return true;
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if (MRI.getVRegDef(r)->getParent() != MBB &&
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V.UsedBlocks.test(MBB->getNumber()))
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return true;
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return false;
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}
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/// isLiveOut - help method that determines, from a VarInfo, if a register is
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/// live out of a block.
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static bool isLiveOut(unsigned r, MachineBasicBlock* MBB,
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MachineRegisterInfo& MRI, LiveVariables& LV) {
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LiveVariables::VarInfo& V = LV.getVarInfo(r);
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if (MBB == MRI.getVRegDef(r)->getParent() ||
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V.UsedBlocks.test(MBB->getNumber())) {
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for (std::vector<MachineInstr*>::iterator I = V.Kills.begin(),
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E = V.Kills.end(); I != E; ++I)
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if ((*I)->getParent() == MBB)
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return false;
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return true;
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}
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return false;
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}
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/// interferes - checks for local interferences by scanning a block. The only
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/// trick parameter is 'mode' which tells it the relationship of the two
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/// registers. 0 - defined in the same block, 1 - first properly dominates
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/// second, 2 - second properly dominates first
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static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
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LiveVariables& LV, unsigned mode) {
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MachineInstr* def = 0;
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MachineInstr* kill = 0;
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// The code is still in SSA form at this point, so there is only one
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// definition per VReg. Thus we can safely use MRI->getVRegDef().
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const MachineRegisterInfo* MRI = &scan->getParent()->getRegInfo();
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bool interference = false;
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// Wallk the block, checking for interferences
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for (MachineBasicBlock::iterator MBI = scan->begin(), MBE = scan->end();
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MBI != MBE; ++MBI) {
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MachineInstr* curr = MBI;
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// Same defining block...
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if (mode == 0) {
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if (curr == MRI->getVRegDef(a)) {
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// If we find our first definition, save it
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if (!def) {
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def = curr;
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// If there's already an unkilled definition, then
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// this is an interference
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} else if (!kill) {
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interference = true;
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break;
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// If there's a definition followed by a KillInst, then
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// they can't interfere
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} else {
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interference = false;
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break;
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}
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// Symmetric with the above
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} else if (curr == MRI->getVRegDef(b)) {
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if (!def) {
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def = curr;
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} else if (!kill) {
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interference = true;
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break;
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} else {
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interference = false;
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break;
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}
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// Store KillInsts if they match up with the definition
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} else if (LV.KillsRegister(curr, a)) {
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if (def == MRI->getVRegDef(a)) {
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kill = curr;
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} else if (LV.KillsRegister(curr, b)) {
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if (def == MRI->getVRegDef(b)) {
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kill = curr;
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}
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}
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}
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// First properly dominates second...
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} else if (mode == 1) {
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if (curr == MRI->getVRegDef(b)) {
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// Definition of second without kill of first is an interference
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if (!kill) {
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interference = true;
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break;
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// Definition after a kill is a non-interference
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} else {
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interference = false;
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break;
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}
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// Save KillInsts of First
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} else if (LV.KillsRegister(curr, a)) {
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kill = curr;
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}
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// Symmetric with the above
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} else if (mode == 2) {
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if (curr == MRI->getVRegDef(a)) {
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if (!kill) {
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interference = true;
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break;
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} else {
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interference = false;
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break;
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}
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} else if (LV.KillsRegister(curr, b)) {
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kill = curr;
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}
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}
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}
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return interference;
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}
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/// processBlock - Determine how to break up PHIs in the current block. Each
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/// PHI is broken up by some combination of renaming its operands and inserting
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/// copies. This method is responsible for determining which operands receive
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/// which treatment.
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void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
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LiveVariables& LV = getAnalysis<LiveVariables>();
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MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
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// Holds names that have been added to a set in any PHI within this block
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// before the current one.
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std::set<unsigned> ProcessedNames;
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// Iterate over all the PHI nodes in this block
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MachineBasicBlock::iterator P = MBB->begin();
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while (P != MBB->end() && P->getOpcode() == TargetInstrInfo::PHI) {
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unsigned DestReg = P->getOperand(0).getReg();
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// PHIUnion is the set of incoming registers to the PHI node that
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// are going to be renames rather than having copies inserted. This set
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// is refinded over the course of this function. UnionedBlocks is the set
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// of corresponding MBBs.
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std::set<unsigned> PHIUnion;
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std::set<MachineBasicBlock*> UnionedBlocks;
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// Iterate over the operands of the PHI node
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for (int i = P->getNumOperands() - 1; i >= 2; i-=2) {
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unsigned SrcReg = P->getOperand(i-1).getReg();
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// Check for trivial interferences via liveness information, allowing us
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// to avoid extra work later. Any registers that interfere cannot both
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// be in the renaming set, so choose one and add copies for it instead.
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// The conditions are:
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// 1) if the operand is live into the PHI node's block OR
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// 2) if the PHI node is live out of the operand's defining block OR
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// 3) if the operand is itself a PHI node and the original PHI is
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// live into the operand's defining block OR
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// 4) if the operand is already being renamed for another PHI node
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// in this block OR
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// 5) if any two operands are defined in the same block, insert copies
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// for one of them
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if (isLiveIn(SrcReg, P->getParent(), MRI, LV) ||
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isLiveOut(P->getOperand(0).getReg(),
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MRI.getVRegDef(SrcReg)->getParent(), MRI, LV) ||
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( MRI.getVRegDef(SrcReg)->getOpcode() == TargetInstrInfo::PHI &&
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isLiveIn(P->getOperand(0).getReg(),
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MRI.getVRegDef(SrcReg)->getParent(), MRI, LV) ) ||
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ProcessedNames.count(SrcReg) ||
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UnionedBlocks.count(MRI.getVRegDef(SrcReg)->getParent())) {
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// Add a copy for the selected register
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MachineBasicBlock* From = P->getOperand(i).getMBB();
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Waiting[From].insert(std::make_pair(SrcReg, DestReg));
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UsedByAnother.insert(SrcReg);
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} else {
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// Otherwise, add it to the renaming set
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PHIUnion.insert(SrcReg);
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UnionedBlocks.insert(MRI.getVRegDef(SrcReg)->getParent());
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}
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}
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// Compute the dominator forest for the renaming set. This is a forest
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// where the nodes are the registers and the edges represent dominance
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// relations between the defining blocks of the registers
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std::vector<StrongPHIElimination::DomForestNode*> DF =
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computeDomForest(PHIUnion, MRI);
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// Walk DomForest to resolve interferences at an inter-block level. This
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// will remove registers from the renaming set (and insert copies for them)
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// if interferences are found.
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std::vector<std::pair<unsigned, unsigned> > localInterferences;
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processPHIUnion(P, PHIUnion, DF, localInterferences);
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// The dominator forest walk may have returned some register pairs whose
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// interference cannot be determines from dominator analysis. We now
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// examine these pairs for local interferences.
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for (std::vector<std::pair<unsigned, unsigned> >::iterator I =
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localInterferences.begin(), E = localInterferences.end(); I != E; ++I) {
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std::pair<unsigned, unsigned> p = *I;
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MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>();
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// Determine the block we need to scan and the relationship between
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// the two registers
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MachineBasicBlock* scan = 0;
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unsigned mode = 0;
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if (MRI.getVRegDef(p.first)->getParent() ==
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MRI.getVRegDef(p.second)->getParent()) {
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scan = MRI.getVRegDef(p.first)->getParent();
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mode = 0; // Same block
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} else if (MDT.dominates(MRI.getVRegDef(p.first)->getParent(),
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MRI.getVRegDef(p.second)->getParent())) {
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scan = MRI.getVRegDef(p.second)->getParent();
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mode = 1; // First dominates second
|
|
} else {
|
|
scan = MRI.getVRegDef(p.first)->getParent();
|
|
mode = 2; // Second dominates first
|
|
}
|
|
|
|
// If there's an interference, we need to insert copies
|
|
if (interferes(p.first, p.second, scan, LV, mode)) {
|
|
// Insert copies for First
|
|
for (int i = P->getNumOperands() - 1; i >= 2; i-=2) {
|
|
if (P->getOperand(i-1).getReg() == p.first) {
|
|
unsigned SrcReg = p.first;
|
|
MachineBasicBlock* From = P->getOperand(i).getMBB();
|
|
|
|
Waiting[From].insert(std::make_pair(SrcReg,
|
|
P->getOperand(0).getReg()));
|
|
UsedByAnother.insert(SrcReg);
|
|
|
|
PHIUnion.erase(SrcReg);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Add the renaming set for this PHI node to our overal renaming information
|
|
RenameSets.insert(std::make_pair(P->getOperand(0).getReg(), PHIUnion));
|
|
|
|
// Remember which registers are already renamed, so that we don't try to
|
|
// rename them for another PHI node in this block
|
|
ProcessedNames.insert(PHIUnion.begin(), PHIUnion.end());
|
|
|
|
++P;
|
|
}
|
|
}
|
|
|
|
/// processPHIUnion - Take a set of candidate registers to be coallesced when
|
|
/// decomposing the PHI instruction. Use the DominanceForest to remove the ones
|
|
/// that are known to interfere, and flag others that need to be checked for
|
|
/// local interferences.
|
|
void StrongPHIElimination::processPHIUnion(MachineInstr* Inst,
|
|
std::set<unsigned>& PHIUnion,
|
|
std::vector<StrongPHIElimination::DomForestNode*>& DF,
|
|
std::vector<std::pair<unsigned, unsigned> >& locals) {
|
|
|
|
std::vector<DomForestNode*> worklist(DF.begin(), DF.end());
|
|
SmallPtrSet<DomForestNode*, 4> visited;
|
|
|
|
// Code is still in SSA form, so we can use MRI::getVRegDef()
|
|
MachineRegisterInfo& MRI = Inst->getParent()->getParent()->getRegInfo();
|
|
|
|
LiveVariables& LV = getAnalysis<LiveVariables>();
|
|
unsigned DestReg = Inst->getOperand(0).getReg();
|
|
|
|
// DF walk on the DomForest
|
|
while (!worklist.empty()) {
|
|
DomForestNode* DFNode = worklist.back();
|
|
|
|
visited.insert(DFNode);
|
|
|
|
bool inserted = false;
|
|
for (DomForestNode::iterator CI = DFNode->begin(), CE = DFNode->end();
|
|
CI != CE; ++CI) {
|
|
DomForestNode* child = *CI;
|
|
|
|
// If the current node is live-out of the defining block of one of its
|
|
// children, insert a copy for it. NOTE: The paper actually calls for
|
|
// a more elaborate heuristic for determining whether to insert copies
|
|
// for the child or the parent. In the interest of simplicity, we're
|
|
// just always choosing the parent.
|
|
if (isLiveOut(DFNode->getReg(),
|
|
MRI.getVRegDef(child->getReg())->getParent(), MRI, LV)) {
|
|
// Insert copies for parent
|
|
for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
|
|
if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) {
|
|
unsigned SrcReg = DFNode->getReg();
|
|
MachineBasicBlock* From = Inst->getOperand(i).getMBB();
|
|
|
|
Waiting[From].insert(std::make_pair(SrcReg, DestReg));
|
|
UsedByAnother.insert(SrcReg);
|
|
|
|
PHIUnion.erase(SrcReg);
|
|
}
|
|
}
|
|
|
|
// If a node is live-in to the defining block of one of its children, but
|
|
// not live-out, then we need to scan that block for local interferences.
|
|
} else if (isLiveIn(DFNode->getReg(),
|
|
MRI.getVRegDef(child->getReg())->getParent(),
|
|
MRI, LV) ||
|
|
MRI.getVRegDef(DFNode->getReg())->getParent() ==
|
|
MRI.getVRegDef(child->getReg())->getParent()) {
|
|
// Add (p, c) to possible local interferences
|
|
locals.push_back(std::make_pair(DFNode->getReg(), child->getReg()));
|
|
}
|
|
|
|
if (!visited.count(child)) {
|
|
worklist.push_back(child);
|
|
inserted = true;
|
|
}
|
|
}
|
|
|
|
if (!inserted) worklist.pop_back();
|
|
}
|
|
}
|
|
|
|
/// ScheduleCopies - Insert copies into predecessor blocks, scheduling
|
|
/// them properly so as to avoid the 'lost copy' and the 'virtual swap'
|
|
/// problems.
|
|
///
|
|
/// Based on "Practical Improvements to the Construction and Destruction
|
|
/// of Static Single Assignment Form" by Briggs, et al.
|
|
void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
|
|
std::set<unsigned>& pushed) {
|
|
// FIXME: This function needs to update LiveVariables
|
|
std::map<unsigned, unsigned>& copy_set= Waiting[MBB];
|
|
|
|
std::map<unsigned, unsigned> worklist;
|
|
std::map<unsigned, unsigned> map;
|
|
|
|
// Setup worklist of initial copies
|
|
for (std::map<unsigned, unsigned>::iterator I = copy_set.begin(),
|
|
E = copy_set.end(); I != E; ) {
|
|
map.insert(std::make_pair(I->first, I->first));
|
|
map.insert(std::make_pair(I->second, I->second));
|
|
|
|
if (!UsedByAnother.count(I->first)) {
|
|
worklist.insert(*I);
|
|
|
|
// Avoid iterator invalidation
|
|
unsigned first = I->first;
|
|
++I;
|
|
copy_set.erase(first);
|
|
} else {
|
|
++I;
|
|
}
|
|
}
|
|
|
|
LiveVariables& LV = getAnalysis<LiveVariables>();
|
|
MachineFunction* MF = MBB->getParent();
|
|
MachineRegisterInfo& MRI = MF->getRegInfo();
|
|
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
|
|
|
|
// Iterate over the worklist, inserting copies
|
|
while (!worklist.empty() || !copy_set.empty()) {
|
|
while (!worklist.empty()) {
|
|
std::pair<unsigned, unsigned> curr = *worklist.begin();
|
|
worklist.erase(curr.first);
|
|
|
|
const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first);
|
|
|
|
if (isLiveOut(curr.second, MBB, MRI, LV)) {
|
|
// Create a temporary
|
|
unsigned t = MF->getRegInfo().createVirtualRegister(RC);
|
|
|
|
// Insert copy from curr.second to a temporary at
|
|
// the Phi defining curr.second
|
|
MachineBasicBlock::iterator PI = MRI.getVRegDef(curr.second);
|
|
TII->copyRegToReg(*PI->getParent(), PI, t,
|
|
curr.second, RC, RC);
|
|
|
|
// Push temporary on Stacks
|
|
Stacks[curr.second].push_back(t);
|
|
|
|
// Insert curr.second in pushed
|
|
pushed.insert(curr.second);
|
|
}
|
|
|
|
// Insert copy from map[curr.first] to curr.second
|
|
TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), curr.second,
|
|
map[curr.first], RC, RC);
|
|
map[curr.first] = curr.second;
|
|
|
|
// If curr.first is a destination in copy_set...
|
|
for (std::map<unsigned, unsigned>::iterator I = copy_set.begin(),
|
|
E = copy_set.end(); I != E; )
|
|
if (curr.first == I->second) {
|
|
std::pair<unsigned, unsigned> temp = *I;
|
|
|
|
// Avoid iterator invalidation
|
|
++I;
|
|
copy_set.erase(temp.first);
|
|
worklist.insert(temp);
|
|
|
|
break;
|
|
} else {
|
|
++I;
|
|
}
|
|
}
|
|
|
|
if (!copy_set.empty()) {
|
|
std::pair<unsigned, unsigned> curr = *copy_set.begin();
|
|
copy_set.erase(curr.first);
|
|
|
|
const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first);
|
|
|
|
// Insert a copy from dest to a new temporary t at the end of b
|
|
unsigned t = MF->getRegInfo().createVirtualRegister(RC);
|
|
TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), t,
|
|
curr.second, RC, RC);
|
|
map[curr.second] = t;
|
|
|
|
worklist.insert(curr);
|
|
}
|
|
}
|
|
}
|
|
|
|
/// InsertCopies - insert copies into MBB and all of its successors
|
|
void StrongPHIElimination::InsertCopies(MachineBasicBlock* MBB,
|
|
std::set<MachineBasicBlock*>& visited) {
|
|
visited.insert(MBB);
|
|
|
|
std::set<unsigned> pushed;
|
|
|
|
// Rewrite register uses from Stacks
|
|
for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
|
|
I != E; ++I)
|
|
for (unsigned i = 0; i < I->getNumOperands(); ++i)
|
|
if (I->getOperand(i).isRegister() &&
|
|
Stacks[I->getOperand(i).getReg()].size()) {
|
|
I->getOperand(i).setReg(Stacks[I->getOperand(i).getReg()].back());
|
|
}
|
|
|
|
// Schedule the copies for this block
|
|
ScheduleCopies(MBB, pushed);
|
|
|
|
// Recur to our successors
|
|
for (GraphTraits<MachineBasicBlock*>::ChildIteratorType I =
|
|
GraphTraits<MachineBasicBlock*>::child_begin(MBB), E =
|
|
GraphTraits<MachineBasicBlock*>::child_end(MBB); I != E; ++I)
|
|
if (!visited.count(*I))
|
|
InsertCopies(*I, visited);
|
|
|
|
// As we exit this block, pop the names we pushed while processing it
|
|
for (std::set<unsigned>::iterator I = pushed.begin(),
|
|
E = pushed.end(); I != E; ++I)
|
|
Stacks[*I].pop_back();
|
|
}
|
|
|
|
bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) {
|
|
// Compute DFS numbers of each block
|
|
computeDFS(Fn);
|
|
|
|
// Determine which phi node operands need copies
|
|
for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
|
|
if (!I->empty() &&
|
|
I->begin()->getOpcode() == TargetInstrInfo::PHI)
|
|
processBlock(I);
|
|
|
|
// Insert copies
|
|
// FIXME: This process should probably preserve LiveVariables
|
|
std::set<MachineBasicBlock*> visited;
|
|
InsertCopies(Fn.begin(), visited);
|
|
|
|
// Perform renaming
|
|
typedef std::map<unsigned, std::set<unsigned> > RenameSetType;
|
|
for (RenameSetType::iterator I = RenameSets.begin(), E = RenameSets.end();
|
|
I != E; ++I)
|
|
for (std::set<unsigned>::iterator SI = I->second.begin(),
|
|
SE = I->second.end(); SI != SE; ++SI)
|
|
Fn.getRegInfo().replaceRegWith(*SI, I->first);
|
|
|
|
// FIXME: Insert last-minute copies
|
|
|
|
// Remove PHIs
|
|
std::vector<MachineInstr*> phis;
|
|
for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
|
|
for (MachineBasicBlock::iterator BI = I->begin(), BE = I->end();
|
|
BI != BE; ++BI)
|
|
if (BI->getOpcode() == TargetInstrInfo::PHI)
|
|
phis.push_back(BI);
|
|
}
|
|
|
|
for (std::vector<MachineInstr*>::iterator I = phis.begin(), E = phis.end();
|
|
I != E; ++I)
|
|
(*I)->eraseFromParent();
|
|
|
|
return false;
|
|
}
|