mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 11:42:57 +01:00
8050b0610b
With this patch, the "instruction dispatched" event now provides information related to the number of microarchitectural registers used in each register file. Similarly, the "instruction retired" event is now able to tell how may registers are freed in each register file. Currently, the BackendStatistics view is the only consumer of register usage/pressure information. BackendStatistics uses that info to print out a few general statistics (i.e. max number of mappings used; total mapping created). Before this patch, the BackendStatistics was forced to query the Backend to obtain the register pressure information. This helps removes that dependency. Now views are completely independent from the Backend. As a consequence, it should be easier to address PR36663 and further modularize the pipeline. Added a couple of test cases in the BtVer2 specific directory. llvm-svn: 328129
198 lines
6.7 KiB
C++
198 lines
6.7 KiB
C++
//===--------------------- BackendStatistics.cpp ---------------*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
/// \file
|
|
///
|
|
/// Functionalities used by the BackendPrinter to print out histograms
|
|
/// related to number of {dispatch/issue/retire} per number of cycles.
|
|
///
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include "BackendStatistics.h"
|
|
#include "llvm/Support/Format.h"
|
|
|
|
using namespace llvm;
|
|
|
|
namespace mca {
|
|
|
|
void BackendStatistics::onInstructionEvent(const HWInstructionEvent &Event) {
|
|
switch (Event.Type) {
|
|
default:
|
|
break;
|
|
case HWInstructionEvent::Retired: {
|
|
const auto &RE = static_cast<const HWInstructionRetiredEvent &>(Event);
|
|
for (unsigned I = 0, E = RegisterFiles.size(); I < E; ++I)
|
|
RegisterFiles[I].CurrentlyUsedMappings -= RE.FreedPhysRegs[I];
|
|
|
|
++NumRetired;
|
|
break;
|
|
}
|
|
case HWInstructionEvent::Issued:
|
|
++NumIssued;
|
|
break;
|
|
case HWInstructionEvent::Dispatched: {
|
|
const auto &DE = static_cast<const HWInstructionDispatchedEvent &>(Event);
|
|
for (unsigned I = 0, E = RegisterFiles.size(); I < E; ++I) {
|
|
RegisterFileUsage &RFU = RegisterFiles[I];
|
|
unsigned NumUsedPhysRegs = DE.UsedPhysRegs[I];
|
|
RFU.CurrentlyUsedMappings += NumUsedPhysRegs;
|
|
RFU.TotalMappings += NumUsedPhysRegs;
|
|
RFU.MaxUsedMappings =
|
|
std::max(RFU.MaxUsedMappings, RFU.CurrentlyUsedMappings);
|
|
}
|
|
|
|
++NumDispatched;
|
|
}
|
|
}
|
|
}
|
|
|
|
void BackendStatistics::onReservedBuffers(ArrayRef<unsigned> Buffers) {
|
|
for (const unsigned Buffer : Buffers) {
|
|
if (BufferedResources.find(Buffer) != BufferedResources.end()) {
|
|
BufferUsage &BU = BufferedResources[Buffer];
|
|
BU.SlotsInUse++;
|
|
BU.MaxUsedSlots = std::max(BU.MaxUsedSlots, BU.SlotsInUse);
|
|
continue;
|
|
}
|
|
|
|
BufferedResources.insert(
|
|
std::pair<unsigned, BufferUsage>(Buffer, {1U, 1U}));
|
|
}
|
|
}
|
|
|
|
void BackendStatistics::onReleasedBuffers(ArrayRef<unsigned> Buffers) {
|
|
for (const unsigned Buffer : Buffers) {
|
|
assert(BufferedResources.find(Buffer) != BufferedResources.end() &&
|
|
"Buffered resource not in map?");
|
|
BufferUsage &BU = BufferedResources[Buffer];
|
|
BU.SlotsInUse--;
|
|
}
|
|
}
|
|
|
|
void BackendStatistics::printRetireUnitStatistics(llvm::raw_ostream &OS) const {
|
|
std::string Buffer;
|
|
raw_string_ostream TempStream(Buffer);
|
|
TempStream << "\n\nRetire Control Unit - "
|
|
<< "number of cycles where we saw N instructions retired:\n";
|
|
TempStream << "[# retired], [# cycles]\n";
|
|
|
|
for (const std::pair<unsigned, unsigned> &Entry : RetiredPerCycle) {
|
|
TempStream << " " << Entry.first;
|
|
if (Entry.first < 10)
|
|
TempStream << ", ";
|
|
else
|
|
TempStream << ", ";
|
|
TempStream << Entry.second << " ("
|
|
<< format("%.1f", ((double)Entry.second / NumCycles) * 100.0)
|
|
<< "%)\n";
|
|
}
|
|
|
|
TempStream.flush();
|
|
OS << Buffer;
|
|
}
|
|
|
|
void BackendStatistics::printDispatchUnitStatistics(
|
|
llvm::raw_ostream &OS) const {
|
|
std::string Buffer;
|
|
raw_string_ostream TempStream(Buffer);
|
|
TempStream << "\n\nDispatch Logic - "
|
|
<< "number of cycles where we saw N instructions dispatched:\n";
|
|
TempStream << "[# dispatched], [# cycles]\n";
|
|
for (const std::pair<unsigned, unsigned> &Entry : DispatchGroupSizePerCycle) {
|
|
TempStream << " " << Entry.first << ", " << Entry.second
|
|
<< " ("
|
|
<< format("%.1f", ((double)Entry.second / NumCycles) * 100.0)
|
|
<< "%)\n";
|
|
}
|
|
|
|
TempStream.flush();
|
|
OS << Buffer;
|
|
}
|
|
|
|
void BackendStatistics::printSchedulerStatistics(llvm::raw_ostream &OS) const {
|
|
std::string Buffer;
|
|
raw_string_ostream TempStream(Buffer);
|
|
TempStream << "\n\nSchedulers - number of cycles where we saw N instructions "
|
|
"issued:\n";
|
|
TempStream << "[# issued], [# cycles]\n";
|
|
for (const std::pair<unsigned, unsigned> &Entry : IssuedPerCycle) {
|
|
TempStream << " " << Entry.first << ", " << Entry.second << " ("
|
|
<< format("%.1f", ((double)Entry.second / NumCycles) * 100)
|
|
<< "%)\n";
|
|
}
|
|
|
|
TempStream.flush();
|
|
OS << Buffer;
|
|
}
|
|
|
|
void BackendStatistics::printRATStatistics(raw_ostream &OS) const {
|
|
std::string Buffer;
|
|
raw_string_ostream TempStream(Buffer);
|
|
|
|
TempStream << "\n\nRegister File statistics.";
|
|
for (unsigned I = 0, E = RegisterFiles.size(); I < E; ++I) {
|
|
const RegisterFileUsage &RFU = RegisterFiles[I];
|
|
TempStream << "\nRegister File #" << I;
|
|
TempStream << "\n Total number of mappings created: " << RFU.TotalMappings;
|
|
TempStream << "\n Max number of mappings used: "
|
|
<< RFU.MaxUsedMappings;
|
|
}
|
|
|
|
TempStream.flush();
|
|
OS << Buffer;
|
|
}
|
|
|
|
void BackendStatistics::printDispatchStalls(raw_ostream &OS) const {
|
|
std::string Buffer;
|
|
raw_string_ostream TempStream(Buffer);
|
|
TempStream << "\n\nDynamic Dispatch Stall Cycles:\n";
|
|
TempStream << "RAT - Register unavailable: "
|
|
<< HWStalls[HWStallEvent::RegisterFileStall];
|
|
TempStream << "\nRCU - Retire tokens unavailable: "
|
|
<< HWStalls[HWStallEvent::RetireControlUnitStall];
|
|
TempStream << "\nSCHEDQ - Scheduler full: "
|
|
<< HWStalls[HWStallEvent::SchedulerQueueFull];
|
|
TempStream << "\nLQ - Load queue full: "
|
|
<< HWStalls[HWStallEvent::LoadQueueFull];
|
|
TempStream << "\nSQ - Store queue full: "
|
|
<< HWStalls[HWStallEvent::StoreQueueFull];
|
|
TempStream << "\nGROUP - Static restrictions on the dispatch group: "
|
|
<< HWStalls[HWStallEvent::DispatchGroupStall];
|
|
TempStream << '\n';
|
|
TempStream.flush();
|
|
OS << Buffer;
|
|
}
|
|
|
|
void BackendStatistics::printSchedulerUsage(raw_ostream &OS,
|
|
const MCSchedModel &SM) const {
|
|
std::string Buffer;
|
|
raw_string_ostream TempStream(Buffer);
|
|
TempStream << "\n\nScheduler's queue usage:\n";
|
|
// Early exit if no buffered resources were consumed.
|
|
if (BufferedResources.empty()) {
|
|
TempStream << "No scheduler resources used.\n";
|
|
TempStream.flush();
|
|
OS << Buffer;
|
|
return;
|
|
}
|
|
|
|
for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
|
|
const MCProcResourceDesc &ProcResource = *SM.getProcResource(I);
|
|
if (ProcResource.BufferSize <= 0)
|
|
continue;
|
|
|
|
const BufferUsage &BU = BufferedResources.lookup(I);
|
|
TempStream << ProcResource.Name << ", " << BU.MaxUsedSlots << '/'
|
|
<< ProcResource.BufferSize << '\n';
|
|
}
|
|
|
|
TempStream.flush();
|
|
OS << Buffer;
|
|
}
|
|
} // namespace mca
|