1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 20:43:44 +02:00
llvm-mirror/test/CodeGen
2014-08-23 00:45:03 +00:00
..
AArch64 [FastISel][AArch64] Add support for variable shift. 2014-08-21 23:06:07 +00:00
ARM ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
CPP
Generic
Hexagon DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range. 2014-08-06 00:21:25 +00:00
Inputs
Mips [mips] Don't use odd-numbered float registers for double arguments for fastcc 2014-08-22 09:23:22 +00:00
MSP430
NVPTX
PowerPC Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
R600 R600/SI: Use READ2/WRITE2 instructions for 64-bit mem ops with 32-bit alignment 2014-08-22 18:49:35 +00:00
SPARC
SystemZ
Thumb ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
Thumb2 ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
X86 Revert r215611 because it caused the infinite loop in bug 20736. There is a reduced testcase in that bug. 2014-08-23 00:45:03 +00:00
XCore