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ad833f6380
I realized that the live-out set computed for the return block is missing the callee saved registers (the non-pristine ones to be exact). This only affects the liveness computed for instructions inside the function epilogue which currently none of the LivePhysRegs users in llvm cares about, so this is just a drive-by fix without a testcase. Differential Revision: http://reviews.llvm.org/D13180 llvm-svn: 248636
175 lines
5.6 KiB
C++
175 lines
5.6 KiB
C++
//===--- LivePhysRegs.cpp - Live Physical Register Set --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LivePhysRegs utility for tracking liveness of
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// physical registers across machine instructions in forward or backward order.
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// A more detailed description can be found in the corresponding header file.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/LivePhysRegs.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBundle.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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/// \brief Remove all registers from the set that get clobbered by the register
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/// mask.
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/// The clobbers set will be the list of live registers clobbered
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/// by the regmask.
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void LivePhysRegs::removeRegsInMask(const MachineOperand &MO,
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SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers) {
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SparseSet<unsigned>::iterator LRI = LiveRegs.begin();
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while (LRI != LiveRegs.end()) {
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if (MO.clobbersPhysReg(*LRI)) {
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if (Clobbers)
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Clobbers->push_back(std::make_pair(*LRI, &MO));
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LRI = LiveRegs.erase(LRI);
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} else
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++LRI;
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}
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}
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/// Simulates liveness when stepping backwards over an instruction(bundle):
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/// Remove Defs, add uses. This is the recommended way of calculating liveness.
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void LivePhysRegs::stepBackward(const MachineInstr &MI) {
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// Remove defined registers and regmask kills from the set.
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for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
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if (O->isReg()) {
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if (!O->isDef())
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continue;
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unsigned Reg = O->getReg();
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if (Reg == 0)
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continue;
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removeReg(Reg);
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} else if (O->isRegMask())
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removeRegsInMask(*O, nullptr);
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}
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// Add uses to the set.
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for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
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if (!O->isReg() || !O->readsReg() || O->isUndef())
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continue;
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unsigned Reg = O->getReg();
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if (Reg == 0)
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continue;
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addReg(Reg);
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}
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}
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/// Simulates liveness when stepping forward over an instruction(bundle): Remove
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/// killed-uses, add defs. This is the not recommended way, because it depends
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/// on accurate kill flags. If possible use stepBackward() instead of this
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/// function.
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void LivePhysRegs::stepForward(const MachineInstr &MI,
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SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
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// Remove killed registers from the set.
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for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
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if (O->isReg()) {
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unsigned Reg = O->getReg();
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if (Reg == 0)
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continue;
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if (O->isDef()) {
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// Note, dead defs are still recorded. The caller should decide how to
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// handle them.
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Clobbers.push_back(std::make_pair(Reg, &*O));
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} else {
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if (!O->isKill())
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continue;
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assert(O->isUse());
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removeReg(Reg);
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}
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} else if (O->isRegMask())
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removeRegsInMask(*O, &Clobbers);
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}
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// Add defs to the set.
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for (auto Reg : Clobbers) {
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// Skip dead defs. They shouldn't be added to the set.
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if (Reg.second->isReg() && Reg.second->isDead())
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continue;
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addReg(Reg.first);
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}
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}
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/// Prin the currently live registers to OS.
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void LivePhysRegs::print(raw_ostream &OS) const {
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OS << "Live Registers:";
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if (!TRI) {
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OS << " (uninitialized)\n";
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return;
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}
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if (empty()) {
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OS << " (empty)\n";
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return;
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}
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for (const_iterator I = begin(), E = end(); I != E; ++I)
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OS << " " << PrintReg(*I, TRI);
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OS << "\n";
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}
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/// Dumps the currently live registers to the debug output.
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void LivePhysRegs::dump() const {
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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dbgs() << " " << *this;
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#endif
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}
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/// Add live-in registers of basic block \p MBB to \p LiveRegs.
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static void addLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB) {
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for (const auto &LI : MBB.liveins())
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LiveRegs.addReg(LI.PhysReg);
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}
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/// Add pristine registers to the given \p LiveRegs. This function removes
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/// actually saved callee save registers when \p InPrologueEpilogue is false.
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static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF,
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const TargetRegisterInfo &TRI) {
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const MachineFrameInfo &MFI = *MF.getFrameInfo();
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if (!MFI.isCalleeSavedInfoValid())
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return;
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for (const MCPhysReg *CSR = TRI.getCalleeSavedRegs(&MF); CSR && *CSR; ++CSR)
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LiveRegs.addReg(*CSR);
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for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
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LiveRegs.removeReg(Info.getReg());
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}
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void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB,
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bool AddPristinesAndCSRs) {
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if (AddPristinesAndCSRs) {
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const MachineFunction &MF = *MBB->getParent();
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addPristines(*this, MF, *TRI);
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if (!MBB->isReturnBlock()) {
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// The return block has no successors whose live-ins we could merge
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// below. So instead we add the callee saved registers manually.
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for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I)
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addReg(*I);
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}
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}
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// To get the live-outs we simply merge the live-ins of all successors.
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for (const MachineBasicBlock *Succ : MBB->successors())
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::addLiveIns(*this, *Succ);
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}
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void LivePhysRegs::addLiveIns(const MachineBasicBlock *MBB,
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bool AddPristines) {
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if (AddPristines) {
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const MachineFunction &MF = *MBB->getParent();
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addPristines(*this, MF, *TRI);
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}
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::addLiveIns(*this, *MBB);
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}
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