Simon Dardis 0fc0478ed5 [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases ...

Add the instruction alias sgtu (register form only), two operand forms of
s[rl]l and sra, and missing single/two operand forms of dnegu/neg.

Reviewers: dsanders

Differential Revision: https://reviews.llvm.org/D22752

llvm-svn: 276736

2016-07-26 09:13:46 +00:00

..

invalid-mips32.s

[mips] SYNC $stype instruction was added in Mips32

2014-06-18 17:10:30 +00:00

invalid-mips32r2.s

[mips] Marked the DI/EI instruction aliases as MIPS32r2

2014-10-16 15:23:52 +00:00

invalid-mips64.s

[mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier).

2014-06-11 15:05:56 +00:00

invalid-mips64r2-xfail.s

[mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2

2014-05-14 15:35:03 +00:00

invalid-mips64r2.s

[MIPS]Multiple and add instructions for Mips are currently available in mips32r2/mips64r2 and later but should also be available in mips4, mips5, and mips64. This patch fixes the requested features and updates the corresponding test files.

2015-02-25 15:24:37 +00:00

valid-xfail.s

[MIPS]Multiple and add instructions for Mips are currently available in mips32r2/mips64r2 and later but should also be available in mips4, mips5, and mips64. This patch fixes the requested features and updates the corresponding test files.

2015-02-25 15:24:37 +00:00

valid.s

[mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases

2016-07-26 09:13:46 +00:00