Andrew Savonichev 064cc1a22c [MCA] Add support for in-order CPUs ... This patch adds a pipeline to support in-order CPUs such as ARM Cortex-A55. In-order pipeline implements a simplified version of Dispatch, Scheduler and Execute stages as a single stage. Entry and Retire stages are common for both in-order and out-of-order pipelines. Differential Revision: https://reviews.llvm.org/D94928		2021-03-04 14:08:19 +03:00
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Views	[NFC][llvm-mca] Fix compiler warning	2021-02-04 09:44:36 -08:00
CMakeLists.txt	[llvm-mca] Initial implementation of serialization using JSON. The views	2021-01-21 15:15:54 -08:00
CodeRegion.cpp	[llvm] Remove redundant return and continue statements (NFC)	2021-01-14 20:30:34 -08:00
CodeRegion.h
CodeRegionGenerator.cpp
CodeRegionGenerator.h
llvm-mca.cpp	[MCA] Add support for in-order CPUs	2021-03-04 14:08:19 +03:00
PipelinePrinter.cpp	[llvm-mca] Initial implementation of serialization using JSON. The views	2021-01-21 15:15:54 -08:00
PipelinePrinter.h	[llvm-mca] Initial implementation of serialization using JSON. The views	2021-01-21 15:15:54 -08:00