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llvm-mirror/test/CodeGen/Hexagon/feature-memops.ll
Krzysztof Parzyszek a4467d89bc [Hexagon] Add a target feature for memop generation
llvm-svn: 332285
2018-05-14 20:09:07 +00:00

24 lines
490 B
LLVM

; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-LABEL: enabled:
; CHECK: memw({{.*}}) += #1
define void @enabled(i32* %p) #0 {
%v0 = load i32, i32* %p
%v1 = add i32 %v0, 1
store i32 %v1, i32* %p
ret void
}
; CHECK-LABEL: disabled:
; CHECK-NOT: memw({{.*}}) += #1
define void @disabled(i32* %p) #1 {
%v0 = load i32, i32* %p
%v1 = add i32 %v0, 1
store i32 %v1, i32* %p
ret void
}
attributes #0 = { nounwind }
attributes #1 = { nounwind "target-features"="-memops" }