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llvm-mirror/test/CodeGen/Hexagon/inline-asm-error.ll
Krzysztof Parzyszek 66abdd815e [Hexagon] Add more lit tests
llvm-svn: 327271
2018-03-12 14:01:28 +00:00

16 lines
411 B
LLVM

; RUN: not llc -march=hexagon < %s 2>&1 | FileCheck %s
; CHECK: error: Don't know how to handle indirect register inputs yet for constraint 'r'
%s.0 = type { i8*, i32, %s.1 }
%s.1 = type { %s.2 }
%s.2 = type { i32, i8* }
define void @f0(%s.0* byval align 8 %a0) {
b0:
call void asm sideeffect ".weak OFFSET_0;jump ##(OFFSET_0 + 0x14c15f0)", "*r"(%s.0* nonnull %a0), !srcloc !0
ret void
}
!0 = !{i32 10}