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5ab1a3193f
Only consider an instruction a candidate for relaxation if the last operand of the instruction is an expression. We previously checked whether any operand is an expression, which is useless, since for all instructions concerned, the only operand that may be affected by relaxation is the last one. In addition, this removes the check for having RIP as an argument, since it was plain wrong - even when one of the arguments is RIP, relaxation may still be needed. This fixes PR9807. Patch by: david.l.kreitzer@intel.com Differential Revision: http://reviews.llvm.org/D10766 llvm-svn: 241152
77 lines
2.9 KiB
ArmAsm
77 lines
2.9 KiB
ArmAsm
// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-objdump -d - | FileCheck %s
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// Test that we correctly relax these instructions into versions that use
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// 16 or 32 bit immediate values.
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bar:
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// CHECK: Disassembly of section imul:
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// CHECK-NEXT: imul:
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// CHECK-NEXT: 0: 66 69 1d 00 00 00 00 00 00 imulw $0, (%rip), %bx
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// CHECK-NEXT: 9: 69 1d 00 00 00 00 00 00 00 00 imull $0, (%rip), %ebx
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// CHECK-NEXT: 13: 48 69 1d 00 00 00 00 00 00 00 00 imulq $0, (%rip), %rbx
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.section imul,"x"
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imul $foo, bar(%rip), %bx
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imul $foo, bar(%rip), %ebx
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imul $foo, bar(%rip), %rbx
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// CHECK: Disassembly of section and:
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// CHECK-NEXT: and:
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// CHECK-NEXT: 0: 66 81 25 00 00 00 00 00 00 andw $0, (%rip)
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// CHECK-NEXT: 9: 81 25 00 00 00 00 00 00 00 00 andl $0, (%rip)
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// CHECK-NEXT: 13: 48 81 25 00 00 00 00 00 00 00 00 andq $0, (%rip)
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.section and,"x"
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andw $foo, bar(%rip)
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andl $foo, bar(%rip)
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andq $foo, bar(%rip)
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// CHECK: Disassembly of section or:
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// CHECK-NEXT: or:
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// CHECK-NEXT: 0: 66 81 0d 00 00 00 00 00 00 orw $0, (%rip)
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// CHECK-NEXT: 9: 81 0d 00 00 00 00 00 00 00 00 orl $0, (%rip)
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// CHECK-NEXT: 13: 48 81 0d 00 00 00 00 00 00 00 00 orq $0, (%rip)
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.section or,"x"
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orw $foo, bar(%rip)
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orl $foo, bar(%rip)
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orq $foo, bar(%rip)
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// CHECK: Disassembly of section xor:
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// CHECK-NEXT: xor:
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// CHECK-NEXT: 0: 66 81 35 00 00 00 00 00 00 xorw $0, (%rip)
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// CHECK-NEXT: 9: 81 35 00 00 00 00 00 00 00 00 xorl $0, (%rip)
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// CHECK-NEXT: 13: 48 81 35 00 00 00 00 00 00 00 00 xorq $0, (%rip)
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.section xor,"x"
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xorw $foo, bar(%rip)
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xorl $foo, bar(%rip)
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xorq $foo, bar(%rip)
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// CHECK: Disassembly of section add:
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// CHECK-NEXT: add:
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// CHECK-NEXT: 0: 66 81 05 00 00 00 00 00 00 addw $0, (%rip)
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// CHECK-NEXT: 9: 81 05 00 00 00 00 00 00 00 00 addl $0, (%rip)
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// CHECK-NEXT: 13: 48 81 05 00 00 00 00 00 00 00 00 addq $0, (%rip)
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.section add,"x"
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addw $foo, bar(%rip)
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addl $foo, bar(%rip)
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addq $foo, bar(%rip)
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// CHECK: Disassembly of section sub:
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// CHECK-NEXT: sub:
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// CHECK-NEXT: 0: 66 81 2d 00 00 00 00 00 00 subw $0, (%rip)
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// CHECK-NEXT: 9: 81 2d 00 00 00 00 00 00 00 00 subl $0, (%rip)
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// CHECK-NEXT: 13: 48 81 2d 00 00 00 00 00 00 00 00 subq $0, (%rip)
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.section sub,"x"
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subw $foo, bar(%rip)
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subl $foo, bar(%rip)
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subq $foo, bar(%rip)
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// CHECK: Disassembly of section cmp:
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// CHECK-NEXT: cmp:
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// CHECK-NEXT: 0: 66 81 3d 00 00 00 00 00 00 cmpw $0, (%rip)
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// CHECK-NEXT: 9: 81 3d 00 00 00 00 00 00 00 00 cmpl $0, (%rip)
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// CHECK-NEXT: 13: 48 81 3d 00 00 00 00 00 00 00 00 cmpq $0, (%rip)
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.section cmp,"x"
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cmpw $foo, bar(%rip)
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cmpl $foo, bar(%rip)
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cmpq $foo, bar(%rip)
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