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https://github.com/RPCS3/llvm-mirror.git
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59de807f62
This is the groundwork required to implement strictfp. For now, this should be NFC for regular instructoins (many instructions just gain an extra use of a reserved register). Regalloc won't rematerialize instructions with reads of physical registers, but we were suffering from that anyway with the exec reads. Should add it for all the related FP uses (possibly with some extras). I did not add it to either the gpr index mode instructions (or every single VALU instruction) since it's a ridiculous feature already modeled as an arbitrary side effect. Also work towards marking instructions with FP exceptions. This doesn't actually set the bit yet since this would start to change codegen. It seems nofpexcept is currently not implied from the regular IR FP operations. Add it to some MIR tests where I think it might matter.
185 lines
6.8 KiB
YAML
185 lines
6.8 KiB
YAML
# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -run-pass=simple-register-coalescing -o - %s | FileCheck -check-prefix=GCN %s
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# With one version of the D48102 fix, this test failed with
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# Assertion failed: (Id != S.end() && T != S.end() && T->valno == Id->valno), function pruneSubRegValues, file ../lib/CodeGen/RegisterCoalescer.cpp, line 2870.
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# GCN: {{^body}}
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--- |
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target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
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target triple = "amdgcn--amdpal"
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; Function Attrs: nounwind
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define amdgpu_cs void @_amdgpu_cs_main(<3 x i32> %arg) #0 {
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="gfx803" }
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...
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---
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name: _amdgpu_cs_main
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0', virtual-reg: '%0' }
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body: |
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bb.0:
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successors: %bb.1(0x40000000), %bb.21(0x40000000)
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liveins: $vgpr0, $vgpr1, $vgpr2
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%0:vgpr_32 = COPY killed $vgpr0
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S_CBRANCH_SCC1 %bb.21, implicit undef $scc
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bb.1:
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successors: %bb.2(0x40000000), %bb.17(0x40000000)
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S_CBRANCH_SCC1 %bb.17, implicit undef $scc
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bb.2:
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successors: %bb.4(0x40000000), %bb.3(0x40000000)
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%1:sreg_32_xm0 = S_MOV_B32 0
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%2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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undef %3.sub0:vreg_128 = COPY killed %0
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%3.sub2:vreg_128 = COPY killed %2
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undef %4.sub0:sgpr_256 = COPY %1
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%4.sub1:sgpr_256 = COPY %1
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%4.sub2:sgpr_256 = COPY %1
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%4.sub3:sgpr_256 = COPY %1
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%4.sub4:sgpr_256 = COPY %1
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%4.sub5:sgpr_256 = COPY %1
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%4.sub6:sgpr_256 = COPY %1
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%4.sub7:sgpr_256 = COPY killed %1
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%5:vgpr_32 = IMAGE_LOAD_V1_V4 killed %3, killed %4, 1, -1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from constant-pool, addrspace 4)
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%6:vgpr_32 = nofpexcept V_MAD_F32 0, killed %5, 0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
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%7:vgpr_32 = nofpexcept V_RCP_F32_e32 killed %6, implicit $mode, implicit $exec
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%8:vgpr_32 = nofpexcept V_MUL_F32_e32 0, killed %7, implicit $mode, implicit $exec
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%9:vgpr_32 = nofpexcept V_MAD_F32 0, killed %8, 0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
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dead %10:vgpr_32 = nofpexcept V_MAC_F32_e32 undef %11:vgpr_32, undef %12:vgpr_32, undef %10, implicit $mode, implicit $exec
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undef %13.sub0:vreg_128 = COPY %9
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%14:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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S_CBRANCH_SCC0 %bb.4, implicit undef $scc
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bb.3:
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successors: %bb.6(0x80000000)
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%15:vreg_128 = IMPLICIT_DEF
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%16:vgpr_32 = COPY killed %14
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S_BRANCH %bb.6
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bb.4:
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successors: %bb.5(0x40000000), %bb.7(0x40000000)
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%17:vgpr_32 = nofpexcept V_MAD_F32 0, killed %9, 0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
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%18:vgpr_32 = nofpexcept V_MIN_F32_e32 1065353216, killed %17, implicit $mode, implicit $exec
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%19:sreg_64_xexec = nofpexcept V_CMP_NEQ_F32_e64 0, 1065353216, 0, killed %18, 0, implicit $mode, implicit $exec
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%20:vgpr_32 = V_MOV_B32_e32 2143289344, implicit $exec
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%21:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, killed %20, killed %19, implicit $exec
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%22:sreg_64 = nofpexcept V_CMP_LT_F32_e64 0, 0, 0, killed %21, 0, implicit $mode, implicit $exec
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%23:sreg_64 = COPY $exec, implicit-def $exec
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%24:sreg_64 = S_AND_B64 %23, %22, implicit-def dead $scc
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$exec = S_MOV_B64_term killed %24
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SI_MASK_BRANCH %bb.7, implicit $exec
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S_BRANCH %bb.5
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bb.5:
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successors: %bb.7(0x80000000)
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S_BRANCH %bb.7
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bb.6:
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successors: %bb.8(0x40000000), %bb.10(0x40000000)
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%25:vgpr_32 = COPY killed %16
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%26:vreg_128 = COPY killed %15
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%27:sreg_64 = V_CMP_NE_U32_e64 0, killed %25, implicit $exec
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%28:sreg_64 = S_AND_B64 $exec, killed %27, implicit-def dead $scc
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$vcc = COPY killed %28
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%29:vreg_128 = COPY killed %26
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S_CBRANCH_VCCNZ %bb.8, implicit killed $vcc
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S_BRANCH %bb.10
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bb.7:
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successors: %bb.6(0x80000000)
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$exec = S_OR_B64 $exec, killed %23, implicit-def $scc
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%30:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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%15:vreg_128 = COPY %13
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%16:vgpr_32 = COPY killed %30
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S_BRANCH %bb.6
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bb.8:
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successors: %bb.9(0x40000000), %bb.11(0x40000000)
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%31:vreg_128 = COPY killed %13
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S_CBRANCH_SCC1 %bb.11, implicit undef $scc
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S_BRANCH %bb.9
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bb.9:
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successors: %bb.11(0x80000000)
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%32:sreg_32_xm0 = S_MOV_B32 0
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undef %33.sub0:sgpr_128 = COPY %32
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%33.sub1:sgpr_128 = COPY %32
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%33.sub2:sgpr_128 = COPY %32
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%33.sub3:sgpr_128 = COPY killed %32
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%34:sgpr_128 = COPY killed %33
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%35:vreg_128 = COPY killed %34
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%31:vreg_128 = COPY killed %35
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S_BRANCH %bb.11
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bb.10:
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successors: %bb.14(0x80000000)
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%36:vreg_128 = COPY killed %29
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S_BRANCH %bb.14
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bb.11:
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successors: %bb.13(0x40000000), %bb.12(0x40000000)
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%37:vreg_128 = COPY killed %31
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S_CBRANCH_SCC0 %bb.13, implicit undef $scc
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bb.12:
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successors: %bb.10(0x80000000)
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%29:vreg_128 = COPY killed %37
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S_BRANCH %bb.10
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bb.13:
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successors: %bb.10(0x80000000)
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%29:vreg_128 = COPY killed %37
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S_BRANCH %bb.10
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bb.14:
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successors: %bb.15(0x40000000), %bb.16(0x40000000)
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%38:vgpr_32 = nofpexcept V_MAD_F32 0, killed %36.sub0, 0, target-flags(amdgpu-gotprel) 0, 0, 0, 0, 0, implicit $mode, implicit $exec
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%39:vgpr_32 = nofpexcept V_MAD_F32 0, killed %38, 0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
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%40:vgpr_32 = nofpexcept V_MAD_F32 0, killed %39, 0, -1090519040, 0, 1056964608, 0, 0, implicit $mode, implicit $exec
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%41:vgpr_32 = nofpexcept V_MAD_F32 0, killed %40, 0, 0, 0, -1090519040, 0, 0, implicit $mode, implicit $exec
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%42:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 killed %41, implicit $mode, implicit $exec
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%43:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_IMM undef %44:sgpr_128, 12, 0, 0 :: (dereferenceable invariant load 4)
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%45:vgpr_32 = V_MUL_LO_I32 killed %42, killed %43, implicit $exec
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%46:vgpr_32 = V_LSHLREV_B32_e32 2, killed %45, implicit $exec
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%47:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN killed %46, undef %48:sgpr_128, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from constant-pool, align 1, addrspace 4)
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%49:sreg_64 = V_CMP_NE_U32_e64 0, killed %47, implicit $exec
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%50:sreg_64 = COPY $exec, implicit-def $exec
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%51:sreg_64 = S_AND_B64 %50, %49, implicit-def dead $scc
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$exec = S_MOV_B64_term killed %51
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SI_MASK_BRANCH %bb.16, implicit $exec
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S_BRANCH %bb.15
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bb.15:
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successors: %bb.16(0x80000000)
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bb.16:
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successors: %bb.17(0x80000000)
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$exec = S_OR_B64 $exec, killed %50, implicit-def $scc
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S_BRANCH %bb.17
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bb.17:
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successors: %bb.21(0x40000000), %bb.18(0x40000000)
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S_CBRANCH_SCC1 %bb.21, implicit undef $scc
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bb.18:
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successors: %bb.19(0x40000000), %bb.20(0x40000000)
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S_CBRANCH_SCC1 %bb.19, implicit undef $scc
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S_BRANCH %bb.20
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bb.19:
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successors: %bb.20(0x80000000)
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bb.20:
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successors: %bb.21(0x80000000)
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bb.21:
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S_ENDPGM 0
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...
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