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3490945bcb
This patch makes the parser
- reject higher vector registers (>=16) in operands where they should not
be accepted.
- accept higher integers (>=16) in vector register operands.
Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D88888
307 lines
7.0 KiB
ArmAsm
307 lines
7.0 KiB
ArmAsm
# RUN: not llvm-mc -triple s390x-linux-gnu < %s 2> %t
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# RUN: FileCheck < %t %s
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# Test GR32 operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %a0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %c0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %r0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %r0,%c1
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#CHECK: error: invalid register
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#CHECK: lr %r0,16
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#CHECK: error: unexpected token in argument list
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#CHECK: lr %r0,0(%r1)
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lr %f0,%r1
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lr %a0,%r1
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lr %c0,%r1
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lr %r0,%f1
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lr %r0,%a1
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lr %r0,%c1
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lr %r0,16
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lr %r0,0(%r1)
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# Test GR64 operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %a0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %c0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %r0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %r0,%c1
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#CHECK: error: invalid register
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#CHECK: lgr %r0,16
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#CHECK: error: unexpected token in argument list
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#CHECK: lgr %r0,0(%r1)
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lgr %f0,%r1
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lgr %a0,%r1
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lgr %c0,%r1
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lgr %r0,%f1
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lgr %r0,%a1
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lgr %r0,%c1
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lgr %r0,16
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lgr %r0,0(%r1)
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# Test GR128 operands
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#
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#CHECK: error: invalid register pair
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#CHECK: dlr %r1,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r3,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r5,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r7,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r9,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r11,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r13,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r15,%r0
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %a0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %c0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %r0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %r0,%c1
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#CHECK: error: invalid register
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#CHECK: dlr %r0,16
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#CHECK: error: unexpected token in argument list
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#CHECK: dlr %r0,0(%r1)
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dlr %r1,%r0
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dlr %r3,%r0
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dlr %r5,%r0
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dlr %r7,%r0
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dlr %r9,%r0
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dlr %r11,%r0
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dlr %r13,%r0
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dlr %r15,%r0
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dlr %f0,%r1
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dlr %a0,%r1
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dlr %c0,%r1
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dlr %r0,%f1
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dlr %r0,%a1
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dlr %r0,%c1
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dlr %r0,16
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dlr %r0,0(%r1)
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# Test FP32 operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %a0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %c0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %f0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %f0,%c1
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#CHECK: error: invalid register
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#CHECK: ler %f0,16
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#CHECK: error: unexpected token in argument list
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#CHECK: ler %f0,0(%r1)
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ler %r0,%f1
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ler %a0,%f1
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ler %c0,%f1
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ler %f0,%r1
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ler %f0,%a1
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ler %f0,%c1
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ler %f0,16
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ler %f0,0(%r1)
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# Test FP64 operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %a0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %c0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %f0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %f0,%c1
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#CHECK: error: invalid register
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#CHECK: ldr %f0,16
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#CHECK: error: unexpected token in argument list
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#CHECK: ldr %f0,0(%r1)
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ldr %r0,%f1
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ldr %a0,%f1
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ldr %c0,%f1
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ldr %f0,%r1
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ldr %f0,%a1
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ldr %f0,%c1
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ldr %f0,16
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ldr %f0,0(%r1)
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# Test FP128 operands
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#
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#CHECK: error: invalid register pair
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#CHECK: lxr %f2,%f0
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#CHECK: error: invalid register pair
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#CHECK: lxr %f0,%f3
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#CHECK: error: invalid register pair
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#CHECK: lxr %f6,%f0
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#CHECK: error: invalid register pair
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#CHECK: lxr %f0,%f7
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#CHECK: error: invalid register pair
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#CHECK: lxr %f10,%f0
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#CHECK: error: invalid register pair
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#CHECK: lxr %f0,%f11
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#CHECK: error: invalid register pair
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#CHECK: lxr %f14,%f0
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#CHECK: error: invalid register pair
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#CHECK: lxr %f0,%f15
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %a0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %c0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %f0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %f0,%c1
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#CHECK: error: invalid register
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#CHECK: lxr %f0,16
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#CHECK: error: unexpected token in argument list
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#CHECK: lxr %f0,0(%r1)
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lxr %f2,%f0
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lxr %f0,%f3
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lxr %f6,%f0
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lxr %f0,%f7
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lxr %f10,%f0
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lxr %f0,%f11
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lxr %f14,%f0
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lxr %f0,%f15
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lxr %r0,%f1
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lxr %a0,%f1
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lxr %c0,%f1
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lxr %f0,%r1
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lxr %f0,%a1
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lxr %f0,%c1
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lxr %f0,16
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lxr %f0,0(%r1)
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# Test that a high (>=16) vector register is not accepted in a non-vector
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# operand.
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#
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#CHECK: error: invalid register
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#CHECK: .insn rr,0x1800,%v16,%v0
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.insn rr,0x1800,%v16,%v0
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# Test access register operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: ear %r0,%r0
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#CHECK: error: invalid operand for instruction
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#CHECK: ear %r0,%f0
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#CHECK: error: invalid operand for instruction
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#CHECK: ear %r0,%c0
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#CHECK: error: invalid register
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#CHECK: ear %r0,16
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#CHECK: error: unexpected token in argument list
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#CHECK: ear %r0,0(%r1)
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ear %r0,%r0
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ear %r0,%f0
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ear %r0,%c0
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ear %r0,16
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ear %r0,0(%r1)
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# Test control register operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: lctl %c0,%r0,0
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#CHECK: lctl %c0,%f0,0
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#CHECK: lctl %c0,%a0,0
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#CHECK: lctl %c0,16,0
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#CHECK: lctl %c0,0(%r1),0
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lctl %c0,%r0,0
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lctl %c0,%f0,0
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lctl %c0,%a0,0
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lctl %c0,16,0
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lctl %c0,0(%r1),0
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.cfi_startproc
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# Test general register parsing, with no predetermined class in mind.
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#
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#CHECK: error: register expected
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#CHECK: .cfi_offset r0,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %r,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %f,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %a,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %c,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %0,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %r16,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %f16,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %a16,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %c16,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %reef,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %arid,0
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.cfi_offset r0,0
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.cfi_offset %,0
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.cfi_offset %r,0
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.cfi_offset %f,0
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.cfi_offset %a,0
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.cfi_offset %c,0
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.cfi_offset %0,0
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.cfi_offset %r16,0
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.cfi_offset %f16,0
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.cfi_offset %a16,0
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.cfi_offset %c16,0
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.cfi_offset %reef,0
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.cfi_offset %arid,0
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.cfi_endproc
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