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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/TableGen
Craig Topper b555d38aa1 [TableGen] Use sign rotated VBR for OPC_EmitInteger.
This allows for a much more efficient encoding for small negative
numbers by storing the sign bit first and negating the rest of
the bits. This was already being used for OPC_CheckInteger.

For every in tree target this affects, the table got smaller.
R600GenDAGISel.inc saw the largest reduction of 7K.

I did have to add a new opcode for StringIntegers used for
register class ids and subregister indices since we don't have the
integer value to encode. The enum name is emitted directly into
the table. Previously assumed the enum would expand to a positive
7-bit number. We might be able to just shift that right by 1 and
assume it is a positive 6 bit number, but that will need more
investigation.
2021-05-02 12:40:44 -07:00
..
Common
FixedLenDecoderEmitter
GICombinerEmitter
2003-08-03-PassCode.td
2006-09-18-LargeInt.td
2010-03-24-PrematureDefaults.td
address-space-patfrags.td
AliasAsmString.td
AllowDuplicateRegisterNames.td
ambiguous-composition.td
AnonDefinitionOnDemand.td
arithmetic.td
AsmPredicateCombining.td
AsmPredicateCombiningRISCV.td
AsmPredicateCondsEmission.td
AsmVariant.td
assert.td [TableGen] Fix two bugs in 'defm' when complex 'assert' is involved. 2021-04-30 11:31:06 -04:00
BigEncoder.td
BitOffsetDecoder.td
BitsInit.td
BitsInitOverflow.td
cast-list-initializer.td
cast-multiclass.td
cast-string.td
cast-typeerror.td
cast.td
ClassInstanceValue.td
code.td
CodeGenSchedule-duplicate-instrw.td
compare.td
ConcatenatedSubregs.td
cond-bitlist.td
cond-default.td
cond-empty-list-arg.td
cond-inheritance.td
cond-let.td
cond-list.td
cond-subclass.td
cond-type.td
cond-usage.td
condsbit.td
ConstraintChecking1.td
ConstraintChecking2.td
ConstraintChecking3.td
ConstraintChecking4.td
ConstraintChecking5.td
ConstraintChecking6.td
ConstraintChecking7.td
ConstraintChecking.inc
ContextlessPredicates.td
CStyleComment.td
dag-functional.td
dag-isel-regclass-emit-enum.td [TableGen] Use sign rotated VBR for OPC_EmitInteger. 2021-05-02 12:40:44 -07:00
dag-isel-res-order.td
dag-isel-subregs.td [TableGen] Use sign rotated VBR for OPC_EmitInteger. 2021-05-02 12:40:44 -07:00
Dag.td
DAGDefaultOps.td [TableGen] Use sign rotated VBR for OPC_EmitInteger. 2021-05-02 12:40:44 -07:00
DefaultOpsGlobalISel.td
defmclass.td
DefmInherit.td
DefmInsideMultiClass.td
defset-typeerror.td
defset.td
defvar.td
detailed-records.td
directive1.td
directive2.td
directive3.td
duplicate-include.inc
duplicate-include.td
DuplicateFieldValues.td
empty.td
eq-unset.td
eq.td
eqbit.td
FastISelEmitter.td
field-access-initializers.td [TableGen] Resolve concrete but not complete field access initializers 2021-04-13 15:14:56 -07:00
FieldAccess.td
filter.td
find.td [TableGen] Add the !find bang operator 2021-04-28 09:51:00 -04:00
foldl.td
foreach-eval.td
foreach-leak.td
foreach-multiclass.td
foreach-range-parse-errors0.td
foreach-range-parse-errors1.td
foreach-range-parse-errors2.td
foreach-range-parse-errors3.td
foreach-range-parse-errors4.td
foreach-range-parse-errors5.td
foreach-variable-range.td
foreach.td
ForeachList.td
ForeachLoop.td
ForwardRef.td
GeneralList.td
generic-tables-instruction.td
generic-tables.td
get-operand-type.td
getsetop.td
gisel-physreg-input.td
GlobalISelEmitter-atomic_store.td
GlobalISelEmitter-immAllZeroOne.td
GlobalISelEmitter-immarg-literal-pattern.td
GlobalISelEmitter-input-discard.td
GlobalISelEmitter-nested-subregs.td
GlobalISelEmitter-output-discard.td
GlobalISelEmitter-PR39045.td
GlobalISelEmitter-SDNodeXForm-timm.td
GlobalISelEmitter-setcc.td
GlobalISelEmitter-zero-instr.td
GlobalISelEmitter-zero-reg.td
GlobalISelEmitter.td
GlobalISelEmitterCustomPredicate.td
GlobalISelEmitterMatchTableOptimizer.td
GlobalISelEmitterOverloadedPtr.td
GlobalISelEmitterRegSequence.td
GlobalISelEmitterSkippedPatterns.td
GlobalISelEmitterSubreg.td
GlobalISelEmitterVariadic.td
HwModeEncodeDecode.td
HwModeSelect.td
if-empty-list-arg.td
if-type.td
if.td
ifbit.td
ifstmt.td
immarg-predicated.td [GISel] Teach TableGen to check predicates of immediate operands in patterns 2021-04-30 10:18:45 +02:00
immarg.td
Include.inc
Include.td
inhibit-pset.td
IntBitInit.td
interleave.td
intrin-properties.td
intrin-side-effects.td
intrinsic-long-name.td
intrinsic-pointer-to-any.td
intrinsic-struct.td
intrinsic-varargs.td
IntSpecialValues.td
InvalidMCSchedClassDesc.td
isa.td
JSON-check.py
JSON.td
LazyChange.td
LetInsideMultiClasses.td
lisp.td
list-element-bitref.td
ListArgs.td
ListArgsSimple.td
listconcat.td
ListConversion.td
ListManip.td
ListOfList.td
listpaste.td
ListSlices.td [TableGen] Resolve concrete but not complete field access initializers 2021-04-13 15:14:56 -07:00
listsplat.td
lit.local.cfg
LoLoL.td
math.td
MixedCasedMnemonic.td [TableGen] Allow mnemonics aliases with uppercase 2021-04-16 09:58:20 -04:00
MultiClass-def-fail.td
MultiClass-defm-fail.td
MultiClass-defm.td
MultiClass.td
MultiClassDefName.td
MultiClassInherit.td
MultiPat.td
name-resolution-consistency.td
nested-comment.td
NestedForeach.td
paste-reserved.td
Paste.td
pr8330.td
predicate-patfags.td
prep-diag1.td
prep-diag2.td
prep-diag3.td
prep-diag4.td
prep-diag5.td
prep-diag6.td
prep-diag7.td
prep-diag8.td
prep-diag9.td
prep-diag10.td
prep-diag11-include.inc
prep-diag11.td
prep-diag12-include.inc
prep-diag12.td
prep-diag13.td
prep-diag14.td
prep-ifndef-diag-1.td
prep-ifndef-diag-2.td
prep-ifndef.td
prep-region-include.inc
prep-region-processing.td
pset-enum.td
pseudo-inst-expansion.td
range-lists.td
rc-weight-override.td
RegisterBankEmitter.td
RegisterClass.td
RegisterEncoder.td
RegisterInfoEmitter-regcost-list.td
RegisterInfoEmitter-regcost-tuple.td
RegisterInfoEmitter-regcost.td
RelTest.td
SchedModelError.td
searchabletables-intrinsic.td
self-reference-recursion.td
self-reference-typeerror.td
self-reference.td
SetTheory.td
SiblingForeach.td
simplify-patfrag.td
size.td
Slice.td
spurious-semi.td
strconcat.td
String.td
subst2.td
subst.td
substr.td
SuperSubclassSameName.td
TargetInstrInfo.td
TargetInstrSpec.td
template-arg-dependency.td
template-args.td [TableGen] Report an error message on a missing comma 2021-04-09 18:48:49 +01:00
TemplateArgRename.td
Tree.td
TreeNames.td
true-false.td
trydecode-emission2.td
trydecode-emission3.td
trydecode-emission.td
TwoLevelName.td
UnsetBitInit.td
unsetop.td
unterminated-c-comment-include.inc
unterminated-c-comment.td
unterminated-code-block-include.inc
unterminated-code-block.td
UnterminatedComment.td
usevalname.td
ValidIdentifiers.td