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cb3e4b9e0e
function-instrument=xray-never wasn't actually honored before. We were getting lucky that it worked because CodeGenFunction would omit the other xray attributes when a function was annotated with xray_never_instrument. This patch adds proper support. Differential Revision: https://reviews.llvm.org/D89441
269 lines
9.7 KiB
C++
269 lines
9.7 KiB
C++
//===- XRayInstrumentation.cpp - Adds XRay instrumentation to functions. --===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a MachineFunctionPass that inserts the appropriate
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// XRay instrumentation instructions. We look for XRay-specific attributes
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// on the function to determine whether we should insert the replacement
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// operations.
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//
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//===---------------------------------------------------------------------===//
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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namespace {
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struct InstrumentationOptions {
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// Whether to emit PATCHABLE_TAIL_CALL.
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bool HandleTailcall;
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// Whether to emit PATCHABLE_RET/PATCHABLE_FUNCTION_EXIT for all forms of
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// return, e.g. conditional return.
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bool HandleAllReturns;
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};
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struct XRayInstrumentation : public MachineFunctionPass {
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static char ID;
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XRayInstrumentation() : MachineFunctionPass(ID) {
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initializeXRayInstrumentationPass(*PassRegistry::getPassRegistry());
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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AU.addPreserved<MachineLoopInfo>();
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AU.addPreserved<MachineDominatorTree>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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private:
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// Replace the original RET instruction with the exit sled code ("patchable
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// ret" pseudo-instruction), so that at runtime XRay can replace the sled
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// with a code jumping to XRay trampoline, which calls the tracing handler
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// and, in the end, issues the RET instruction.
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// This is the approach to go on CPUs which have a single RET instruction,
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// like x86/x86_64.
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void replaceRetWithPatchableRet(MachineFunction &MF,
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const TargetInstrInfo *TII,
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InstrumentationOptions);
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// Prepend the original return instruction with the exit sled code ("patchable
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// function exit" pseudo-instruction), preserving the original return
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// instruction just after the exit sled code.
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// This is the approach to go on CPUs which have multiple options for the
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// return instruction, like ARM. For such CPUs we can't just jump into the
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// XRay trampoline and issue a single return instruction there. We rather
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// have to call the trampoline and return from it to the original return
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// instruction of the function being instrumented.
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void prependRetWithPatchableExit(MachineFunction &MF,
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const TargetInstrInfo *TII,
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InstrumentationOptions);
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};
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} // end anonymous namespace
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void XRayInstrumentation::replaceRetWithPatchableRet(
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MachineFunction &MF, const TargetInstrInfo *TII,
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InstrumentationOptions op) {
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// We look for *all* terminators and returns, then replace those with
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// PATCHABLE_RET instructions.
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SmallVector<MachineInstr *, 4> Terminators;
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for (auto &MBB : MF) {
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for (auto &T : MBB.terminators()) {
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unsigned Opc = 0;
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if (T.isReturn() &&
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(op.HandleAllReturns || T.getOpcode() == TII->getReturnOpcode())) {
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// Replace return instructions with:
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// PATCHABLE_RET <Opcode>, <Operand>...
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Opc = TargetOpcode::PATCHABLE_RET;
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}
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if (TII->isTailCall(T) && op.HandleTailcall) {
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// Treat the tail call as a return instruction, which has a
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// different-looking sled than the normal return case.
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Opc = TargetOpcode::PATCHABLE_TAIL_CALL;
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}
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if (Opc != 0) {
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auto MIB = BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc))
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.addImm(T.getOpcode());
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for (auto &MO : T.operands())
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MIB.add(MO);
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Terminators.push_back(&T);
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if (T.shouldUpdateCallSiteInfo())
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MF.eraseCallSiteInfo(&T);
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}
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}
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}
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for (auto &I : Terminators)
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I->eraseFromParent();
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}
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void XRayInstrumentation::prependRetWithPatchableExit(
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MachineFunction &MF, const TargetInstrInfo *TII,
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InstrumentationOptions op) {
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for (auto &MBB : MF)
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for (auto &T : MBB.terminators()) {
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unsigned Opc = 0;
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if (T.isReturn() &&
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(op.HandleAllReturns || T.getOpcode() == TII->getReturnOpcode())) {
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Opc = TargetOpcode::PATCHABLE_FUNCTION_EXIT;
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}
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if (TII->isTailCall(T) && op.HandleTailcall) {
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Opc = TargetOpcode::PATCHABLE_TAIL_CALL;
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}
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if (Opc != 0) {
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// Prepend the return instruction with PATCHABLE_FUNCTION_EXIT or
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// PATCHABLE_TAIL_CALL .
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BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc));
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}
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}
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}
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bool XRayInstrumentation::runOnMachineFunction(MachineFunction &MF) {
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auto &F = MF.getFunction();
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auto InstrAttr = F.getFnAttribute("function-instrument");
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bool AlwaysInstrument = InstrAttr.isStringAttribute() &&
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InstrAttr.getValueAsString() == "xray-always";
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bool NeverInstrument = InstrAttr.isStringAttribute() &&
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InstrAttr.getValueAsString() == "xray-never";
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if (NeverInstrument && !AlwaysInstrument)
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return false;
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auto ThresholdAttr = F.getFnAttribute("xray-instruction-threshold");
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auto IgnoreLoopsAttr = F.getFnAttribute("xray-ignore-loops");
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unsigned int XRayThreshold = 0;
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if (!AlwaysInstrument) {
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if (!ThresholdAttr.isStringAttribute())
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return false; // XRay threshold attribute not found.
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if (ThresholdAttr.getValueAsString().getAsInteger(10, XRayThreshold))
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return false; // Invalid value for threshold.
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bool IgnoreLoops = IgnoreLoopsAttr.isValid();
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// Count the number of MachineInstr`s in MachineFunction
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int64_t MICount = 0;
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for (const auto &MBB : MF)
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MICount += MBB.size();
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bool TooFewInstrs = MICount < XRayThreshold;
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if (!IgnoreLoops) {
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// Get MachineDominatorTree or compute it on the fly if it's unavailable
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auto *MDT = getAnalysisIfAvailable<MachineDominatorTree>();
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MachineDominatorTree ComputedMDT;
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if (!MDT) {
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ComputedMDT.getBase().recalculate(MF);
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MDT = &ComputedMDT;
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}
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// Get MachineLoopInfo or compute it on the fly if it's unavailable
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auto *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
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MachineLoopInfo ComputedMLI;
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if (!MLI) {
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ComputedMLI.getBase().analyze(MDT->getBase());
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MLI = &ComputedMLI;
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}
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// Check if we have a loop.
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// FIXME: Maybe make this smarter, and see whether the loops are dependent
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// on inputs or side-effects?
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if (MLI->empty() && TooFewInstrs)
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return false; // Function is too small and has no loops.
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} else if (TooFewInstrs) {
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// Function is too small
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return false;
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}
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}
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// We look for the first non-empty MachineBasicBlock, so that we can insert
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// the function instrumentation in the appropriate place.
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auto MBI = llvm::find_if(
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MF, [&](const MachineBasicBlock &MBB) { return !MBB.empty(); });
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if (MBI == MF.end())
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return false; // The function is empty.
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auto *TII = MF.getSubtarget().getInstrInfo();
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auto &FirstMBB = *MBI;
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auto &FirstMI = *FirstMBB.begin();
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if (!MF.getSubtarget().isXRaySupported()) {
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FirstMI.emitError("An attempt to perform XRay instrumentation for an"
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" unsupported target.");
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return false;
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}
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if (!F.hasFnAttribute("xray-skip-entry")) {
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// First, insert an PATCHABLE_FUNCTION_ENTER as the first instruction of the
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// MachineFunction.
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BuildMI(FirstMBB, FirstMI, FirstMI.getDebugLoc(),
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TII->get(TargetOpcode::PATCHABLE_FUNCTION_ENTER));
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}
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if (!F.hasFnAttribute("xray-skip-exit")) {
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switch (MF.getTarget().getTargetTriple().getArch()) {
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case Triple::ArchType::arm:
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case Triple::ArchType::thumb:
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case Triple::ArchType::aarch64:
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case Triple::ArchType::mips:
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case Triple::ArchType::mipsel:
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case Triple::ArchType::mips64:
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case Triple::ArchType::mips64el: {
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// For the architectures which don't have a single return instruction
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InstrumentationOptions op;
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op.HandleTailcall = false;
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op.HandleAllReturns = true;
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prependRetWithPatchableExit(MF, TII, op);
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break;
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}
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case Triple::ArchType::ppc64le: {
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// PPC has conditional returns. Turn them into branch and plain returns.
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InstrumentationOptions op;
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op.HandleTailcall = false;
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op.HandleAllReturns = true;
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replaceRetWithPatchableRet(MF, TII, op);
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break;
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}
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default: {
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// For the architectures that have a single return instruction (such as
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// RETQ on x86_64).
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InstrumentationOptions op;
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op.HandleTailcall = true;
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op.HandleAllReturns = false;
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replaceRetWithPatchableRet(MF, TII, op);
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break;
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}
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}
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}
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return true;
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}
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char XRayInstrumentation::ID = 0;
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char &llvm::XRayInstrumentationID = XRayInstrumentation::ID;
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INITIALIZE_PASS_BEGIN(XRayInstrumentation, "xray-instrumentation",
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"Insert XRay ops", false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
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INITIALIZE_PASS_END(XRayInstrumentation, "xray-instrumentation",
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"Insert XRay ops", false, false)
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