Sanjay Patel 41b45b2b8c [x86] be more selective about converting 'and' to shuffle (PR37749) ... isVectorClearMaskLegal() is the TLI hook used by the generic DAGCombiner::XformToShuffleWithZero(). We've grown to accomodate/expect this transform to shuffle (disabling it more generally results in many regressions). So I'm narrowly excluding the 256-bit types that clearly are not worthwhile for AVX1. I think in most cases we are able to recover by converting the shuffle back into 'and' ops, but the cases in: https://bugs.llvm.org/show_bug.cgi?id=37749 ...show that there are cracks. llvm-svn: 334759		2018-06-14 19:55:02 +00:00
..
AArch64	Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy bundles"	2018-06-14 19:24:03 +00:00
AMDGPU	AMDGPU/GlobalISel: Implement select() for @llvm.amdgcn.cvt.pkrtz	2018-06-14 19:26:37 +00:00
ARC
ARM	DAG: Fix extract_subvector combine for a single element	2018-06-11 21:27:41 +00:00
AVR	[AVR] Set trackLivenessAfterRegAlloc	2018-06-11 14:46:48 +00:00
BPF
Generic	[DWARFv5] Tolerate files not all having an MD5 checksum.	2018-06-14 13:38:20 +00:00
Hexagon	[DAGCombiner] Recognize more patterns for ABS	2018-06-12 21:51:49 +00:00
Inputs
Lanai
Mips	[mips][microMIPS] Extending size reduction pass with LWP and SWP	2018-06-13 12:51:37 +00:00
MIR
MSP430
Nios2
NVPTX
PowerPC	propagate fast math flags via IR on fma and sub expressions	2018-06-07 22:49:09 +00:00
RISCV	[RISCV] Add codegen support for atomic load/stores with RV32A	2018-06-13 12:04:51 +00:00
SPARC	[Sparc] Add support for 13-bit PIC	2018-06-11 05:50:08 +00:00
SystemZ	[BranchFolding] Fix live-in's when hoisting code	2018-06-07 07:20:33 +00:00
Thumb	[ARM] Allow CMPZ transforms even if the input has multiple uses.	2018-06-08 21:16:56 +00:00
Thumb2
WebAssembly
WinCFGuard
WinEH
X86	[x86] be more selective about converting 'and' to shuffle (PR37749)	2018-06-14 19:55:02 +00:00
XCore