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6d9cbe7270
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Reviewed by Chris Latter and Bob Wilson. llvm-svn: 100233
63 lines
1.0 KiB
Plaintext
63 lines
1.0 KiB
Plaintext
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
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# CHECK: b #0
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0xfe 0xff 0xff 0xea
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# CHECK: bfc r8, #0, #16
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0x1f 0x80 0xcf 0xe7
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# CHECK: bfi r8, r0, #16, #1
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0x10 0x88 0xd0 0xe7
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# CHECK: cmn r0, #1
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0x01 0x00 0x70 0xe3
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# CHECK: dmb nshst
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0x56 0xf0 0x7f 0xf5
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# CHECK: ldr r0, [r2], #15
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0x0f 0x00 0x92 0xe4
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# CHECK: lsls r0, r2, #31
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0x82 0x0f 0xb0 0xe1
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# CHECK: mcr2 p0, #0, r2, cr1, cr0, #7
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0xf0 0x20 0x01 0xfe
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# CHECK: movt r8, #65535
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0xff 0x8f 0x4f 0xe3
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# CHECK: pkhbt r8, r9, r10, lsl #4
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0x1a 0x82 0x89 0xe6
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# CHECK: pop {r0, r2, r4, r6, r8, r10}
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0x55 0x05 0xbd 0xe8
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# CHECK: push {r0, r2, r4, r6, r8, r10}
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0x55 0x05 0x2d 0xe9
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# CHECK: qsax r8, r9, r10
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0x5a 0x8f 0x29 0xe6
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# CHECK: rfedb r0!
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0x00 0x0a 0x30 0xf9
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# CHECK: sbcs r0, pc, #1
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0x01 0x00 0xdf 0xe2
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# CHECK: sbfx r0, r1, #0, #8
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0x51 0x00 0xa7 0xe7
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# CHECK: ssat r8, #1, r10, lsl #8
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0x1a 0x84 0xa0 0xe6
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# CHECK: stmdb r10!, {r4, r5, r6, r7, lr}
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0xf0 0x40 0x2a 0xe9
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# CHECK: teq r0, #31
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0x1f 0x00 0x30 0xe3
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# CHECK: ubfx r0, r0, #16, #1
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0x50 0x08 0xe0 0xe7
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